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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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SST26VF016BEUI 데이터시트(PDF) 51 Page - Microchip Technology |
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SST26VF016BEUI 데이터시트(HTML) 51 Page - Microchip Technology |
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51 / 78 page  2019 Microchip Technology Inc. DS20006153A-page 51 SST26VF016BEUI RECOMMENDED LAND PATTERN Dimension Limits Units Optional Center Pad Width Optional Center Pad Length Contact Pitch Y2 X2 2.45 3.15 MILLIMETERS 1.27 BSC MIN E MAX Contact Pad Length (X8) Contact Pad Width (X8) Y1 X1 1.60 0.60 NOM 12 8 C Contact Pad Spacing 5.40 Contact Pad to Center Pad (X8) G1 0.68 Thermal Via Diameter V Thermal Via Pitch EV 0.30 1.00 BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Dimensioning and tolerancing per ASME Y14.5M For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during reflow process 1. 2. For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: Microchip Technology Drawing C04-1136 Rev A 8-Lead Small Outline Integrated Circuit Package (EQA) - 3.90 mm (1.50 In) Body [SOIC] With 3.10x2.41 mm Exposed Pad E X1 Y1 Y2 X2 EV EV C G1 ØV G2 Contact Pad to Contact Pad (X6) G2 0.67 SILK SCREEN |
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