| 전자부품 데이터시트 검색엔진 |
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XRT75L02 데이터시트(PDF) 9 Page - Exar Corporation |
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XRT75L02 데이터시트(HTML) 9 Page - Exar Corporation |
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9 / 50 page ![]() XRT75L02 xr xr xr xr TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER REV. 1.0.3 7 93 34 RNEG_0/LCV_0 RNEG_1/LCV_1 O Receive Negative Data Output/Line Code Violation Indicator - Channel 0: Receive Negative Data Output/Line Code Violation Indicator - Channel 1: In Dual Rail mode, a negative pulse is output through RNEG. Line Code Violation Indicator - Channel n: If configured in Single Rail mode then Line Code Violation will be output. 8 18 RRING_0 RRING_1 I Receive Ring Input - Channel 0: Receive Ring Input - Channel 1: These pins along with RTIP receive the bipolar line signal from the remote DS3/E3/STS-1 Terminal. 9 17 RTIP_0 RTIP_1 I Receive TIP Input - Channel 0: Receive TIP Input - Channel 1: These pins along with RRING receive the bipolar line signal from the Remote DS3/E3/STS-1 Terminal. 29 RxClkINV/ CS I Hardware Mode: RxClk INVERT Host Mode: Chip Select: Function of this pin depends on whether the XRT75L02 is configured to operate in Hardware mode or Host mode. In Hardware mode, setting this input pin “High” configures the Receiver Sec- tion of all channels to invert the RxClk_n output signals and outputs the recov- ered data via RPOS_n and RNEG_n on the falling edge of RxClk_n. NOTE: If the XRT75L02 is configured in HOST mode, this pin functions as CS input pin (please refer to the pin description for Microprocessor Interface). RECEIVE INTERFACE PIN # SIGNAL NAME TYPE DESCRIPTION |
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