XRT83SL216 datasheet(13/41 Pages) EXAR

13 / 41 page

PRELIMINARY

XRT83SL216

REV. P1.0.3

16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT

CONTROL FUNCTION

NAME

TYPE

DESCRIPTION

JASEL0

JASEL1

G13

H13

Jitter Attenuator Select:

The Jitter Attenuator can be slected to be in the Transmit or Receive path.

NOTE: Internally pulled "High" with a 50k

Ω resistor.

MCLK

Master Clock Input

This pin is used as the internal reference to the LIU. This clock must be

2.048MHz +/-50ppm.

JTAG SECTION

NAME

TYPE

DESCRIPTION

TCK

JTAG Test Clock input, Boundary Scan Clock input:

TDI

JTAG Test Data input, Boundary Scan Test Data Input:

NOTE: Internally pulled "High" with a 50k

Ω resistor.

TDO

JTAG Test Data output:

Boundary Scan Test Data Output:

TMS

JTAG Test Mode Select, Boundary Scan Test Mode Select input pin:

NOTE: Internally pulled "High" with a 50k

Ω resistor.

TRST

JTAG Test Mode Reset, Boundary Scan Mode Reset Input pin:

NOTE: This input pin should be pulled "Low" for normal operation. Internally

pulled "High" with a 50k

Ω resistor.

JASEL1

JASEL0

JA Select is enabled

through

µP Control

JA in Rx Path

JA in Tx Path

JA Disabled

Jitter Attenuator State

XRT83SL216 데이터시트(PDF) 13 Page - Exar Corporation

XRT83SL216 데이터시트(HTML) 13 Page - Exar Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

데이터시트 다운로드

링크 URL