Philips Semiconductors

Product specification

74ABT821

10-bit D-type flip-flop; positive-edge trigger

(3-State)

1995 Sep 06

2

LOGIC SYMBOL

23

45

67

89

10 11

D0 D1 D2 D3 D4 D5 D6 D7 D8 D9

Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9

23 22 21 20 19 18 17 16 15 14

13

1

CP

OE

SA00224

LOGIC SYMBOL (IEEE/IEC)

223

322

421

520

619

718

817

916

13

1

10

15

11

14

2D

1

C2

EN

SA00225

FUNCTION TABLE

INPUTS

INTERNAL

OUTPUTS

OPERATING MODE

OE

CP

Dn

REGISTER

Q0 – Q9

L

L

↑

↑

l

h

L

H

L

H

Load and read register

L

↑

X

NC

NC

Hold

H

H

↑

↑

X

Dn

NC

Dn

Z

Z

Disable outputs

H = High voltage level

h

= High voltage level one set-up time

prior to the Low-to-High clock transition

L

= Low voltage level

l

= Low voltage level one set-up time

prior to the Low-to-High clock transition

NC= No change

X = Don’t care

Z = High impedance “off” state

↑ = Low to High clock transition

↑ = Not a Low-to-High clock transition

LOGIC DIAGRAM

CP Q

D

2

D0

Q0

23

13

CP

1

OE

CP Q

D

3

D1

Q1

22

CP Q

D

4

D2

Q2

21

CP Q

D

5

D3

Q3

20

CP Q

D

6

D4

Q4

19

CP Q

D

7

D5

Q5

18

CP Q

D

8

D6

Q6

17

CP Q

D

9

D7

Q7

16

CP Q

D

10

D8

Q8

15

CP Q

D

11

D9

Q9

14

SA00226