74AHC259 datasheet(13/20 Pages) PHILIPS

13 / 20 page

2000 Mar 14

Philips Semiconductors

Product speciﬁcation

8-bit addressable latch

74AHC259;

74AHCT259

AC WAVEFORMS

handbook, halfpage

MNA569

D input

Qn output

tPHL

tPLH

GND

VCC

(2)

(1)

VOH

VOL

Fig.5

The data input (D) to output (Qn)

propagation delays.

FAMILY

VI INPUT

REQUIREMENTS

VM(1)

INPUT

VM(2)

OUTPUT

AHC

GND to VCC

50% VCC 50% VCC

AHCT

GND to 3.0 V

1.5 V

50% VCC

handbook, halfpage

MNA568

An input

Qn output

tPHL

tPLH

GND

VCC

(2)

(1)

VOH

VOL

Fig.6

The address input (An) to output (Qn)

propagation delays.

FAMILY

VI INPUT

REQUIREMENTS

VM(1)

INPUT

VM(2)

OUTPUT

AHC

GND to VCC

50% VCC 50% VCC

AHCT

GND to 3.0 V

1.5 V

50% VCC

FAMILY

VI INPUT

REQUIREMENTS

VM(1)

INPUT

VM(2)

OUTPUT

AHC

GND to VCC

50% VCC 50% VCC

AHCT

GND to 3.0 V

1.5 V

50% VCC

Fig.7 The enable input (LE) to output (Qn) propagation delays, the enable input pulse width.

handbook, full pagewidth

MNA570

LE input

Qn output

tPHL

tPLH

(2)

VOH

VCC

GND

VCC

GND

VOL

(1)

D input

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