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© 2002 QuickLogic Corporation
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QL82SD Device Data Sheet Rev C
Preliminary
39
www.quicklogic.com
Clock Networks Description
Global Clocks
In the QuickSD device, there are nine global clock networks: one is dedicated and eight are
programmable . Global clocks can drive logic cell, I/O, ECU blocks and RAM registers in the
device. Five global clocks will have access to a Quad Net (local clock network) connection
with a programmable connection to the register inputs. Figure 49 gives the global clock
methodology
Figure 49: Global Clock
Quad-Net Network
There are five Quad-Net local clock networks in each quadrant for a total of 20 in a device.
Each Quad-Net is local to a quadrant. Quad-Net is multiplexed with the clock buffer before
driving the column clock buffers.
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