23LCV1024 datasheet(12/29 Pages) MICROCHIP

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23LCV1024

DS20005156B-page 12

 2012-2021 Microchip Technology Inc.

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

3.1

Chip Select (CS)

A low level on this pin selects the device. A high level

deselects the device and forces it into Standby mode.

When the device is deselected, SO goes to the

high-impedance state, allowing multiple parts to share

the same SPI bus. After power-up, a low level on CS is

required, prior to any sequence being initiated.

3.2

Serial Output (SO)

The SO pin is used to transfer data out of the

23LCV1024. During a read cycle, data are shifted out

on this pin after the falling edge of the serial clock.

3.3

Serial Input (SI)

The SI pin is used to transfer data into the device. It

receives instructions, addresses and data. Data are

latched on the rising edge of the serial clock.

3.4

Serial Dual Interface (SIO0, SIO1)

The SIO0 and SIO1 pins are used for SDI mode of

operation. Functionality of these I/O pins is shared with

SO and SI.

3.5

Serial Clock (SCK)

The SCK pin is used to synchronize the communication

between a host and the 23LCV1024. Instructions,

addresses or data present on the SI pin are latched on

the rising edge of the clock input, while data on the SO

pin are updated after the falling edge of the clock input.

3.6

VBAT Supply Input

The VBAT pin is used as an input for external backup

supply to maintain SRAM data when VCC is below the

VTRIP point. If the VBAT function is not being used, it is

recommended to connect this pin to VSS.

SPI and SDI Pin Designations

TABLE 3-1:

PIN FUNCTION TABLE

Name

PDIP/SOIC/TSSOP

Function

Chip Select Input

SO/SIO1

Serial Data Output/SDI Pin

No Connect

VSS

4Ground

SI/SIO0

Serial Data Input/SDI Pin

SCK

Serial Clock Input

VBAT

External Backup Supply

VCC

Power Supply

SIO1

Vss

Vcc

VBAT

SCK

SIO0

SDI Mode

Vss

Vcc

VBAT

SCK

SPI Mode

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