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74ALVT16823 데이터시트(PDF) 8 Page - NXP Semiconductors

부품명 74ALVT16823
상세설명  18-bit bus-interface D-type flip-flop with reset and enable 3-State
PDF  12 Pages
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제조업체  PHILIPS [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74ALVT16823 데이터시트(HTML) 8 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74ALVT16823
2.5V/3.3V 18-bit bus-interface D-type flip-flop
with reset and enable (3-State)
1998 Jun 12
8
AC SETUP REQUIREMENTS (2.5V
"0.2V RANGE)
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω, Tamb = –40°C to +85°C
LIMITS
SYMBOL
PARAMETER
WAVEFORM
VCC = +2.5V ±0.2V
UNIT
MIN
TYP
ts(H)
ts(L)
Setup time, High or Low
nDx to nCP
3
1.0
1.8
0.5
1.3
ns
th(H)
th(L)
Hold time, High or Low
nDx to nCP
3
0.1
0.1
–1.4
–0.5
ns
tw(H)
tw(L)
nCP pulse width
High or Low
1
2.0
3.0
0.8
2.1
ns
ts(H)
ts(L)
Setup time, High or Low
nCE to nCP
3
1.0
0.5
0.2
–0.1
ns
th(H)
th(L)
Hold time, High or Low
nCE to nCP
3
1.0
1.0
0.2
–0.1
ns
tw(L)
nMR pulse width, Low
2
2.0
0.8
ns
trec
Recovery time
nMR to nCP
2
2.0
1.3
ns
AC WAVEFORMS
For all waveforms, VM = 1.5V or VCC/2 whichever is less
The shaded areas indicate when the input is permitted to change for
predictable output performance.
VM
SH00017
nCP
nQx
VM
tw(H)
tPHL
VM
tPLH
1/fMAX
tw(L)
VM
3.0V or VCC
whichever
is less
0V
0V
VOH
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
VM
nMR
VM
nQx
tw(L)
VM
tPHL
VM
tREC
nCP
SH00018
3.0V or VCC
whichever
is less
0V
3.0V or VCC
whichever
is less
0V
0V
VOH
Waveform 2. Master Reset Pulse WIdth, Master Reset to
Output Delay and Master Reset to Clock Recovery Time
th(H)
ts(H)
nCP
VM
VM
VM
VM
VM
VM
th(L)
ts(L)
nDx,
nCE
SH00019
3.0V or VCC
whichever
is less
0V
3.0V or VCC
whichever
is less
0V
Waveform 3. Data Setup and Hold Times
VOH–0.3V
VM
VM
VM
nQx
tPZH
tPHZ
nOE
0V
VOH
SH00020
3.0V or VCC
whichever
is less
0V
Waveform 4. 3-State Output Enable Time to High Level
and Output Disable Time from High Level



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