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74ALVT16899 데이터시트(PDF) 4 Page - NXP Semiconductors

부품명 74ALVT16899
상세설명  2.5V/3.3V 18-bit latched transceiver with 16-bit parity generator/checker 3-State
PDF  20 Pages
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제조업체  PHILIPS [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74ALVT16899 데이터시트(HTML) 4 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74ALVT16899
2.5V/3.3V 18-bit latched transceiver with 16-bit parity
generator/checker (3-State)
1998 Jun 30
4
LOGIC SYMBOL
3
5
6
7
8
10
11
12
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7
1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7
54
52
51
50
49
47
46
45
14
43
55
56
28
1
LEA
SEL
LEB
ODD/EVEN
1ERRA
1ERRB
13
1APAR
1BPAR
44
2
29
OEB
OEA
SH00083
27
25
24
23
22
20
19
18
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7
2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7
30
32
33
34
35
37
38
39
16
41
55
56
28
1
LEA
SEL
LEB
ODD/EVEN
2ERRA
2ERRB
17
2APAR
2BPAR
40
2
29
OEB
OEA
PARITY AND ERROR FUNCTION TABLE
INPUTS
OUTPUTS
SEL
ODD/EVEN
xPAR
(A or B)
Σ of High
Inputs
xPAR
(B or A)
ERRt
ERRr*
PARITY MODES
H
H
H
Even
Odd
H
H
H
L
H
L
Odd
H
H
L
Even
Odd
L
L
L
H
L
H
Mode
Feed-through/check parity
H
L
H
Even
Odd
H
H
L
H
L
H
Even
H
L
L
Even
Odd
L
L
H
L
H
L
Mode
L
H
H
Even
Odd
H
L
H
L
H
H
Odd
L
H
L
Even
Odd
H
L
L
H
H
H
Mode
Generate parity
L
L
H
Even
Odd
L
H
L
H
H
H
Even
L
L
L
Even
Odd
L
H
H
L
H
H
Mode
H = High voltage level
L
= Low voltage level
t
= Transmit–if the data path is from A
→B then ERRt is ERRA
r
= Receive–if the data path is from A
→B then ERRr is ERRB
*
Blocked if latch is not transparent



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