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LM4985TM 데이터시트(PDF) 4 Page - National Semiconductor (TI) |
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LM4985TM 데이터시트(HTML) 4 Page - National Semiconductor (TI) |
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4 / 29 page ![]() Connection Diagrams micro SMD Package micro SMD Marking 20169715 Top View Order Number LM4985TM See NS Package Number TMD12AAA 20169730 Top View X – Date Code T – Die Traceability G – Boomer Family H2 – LM4985TM Pin Reference, Name, and Function Reference Name Function A1 ADR I 2C serial interface address input. A2 IN2 Analog signal input two. A3 OUT2 Power amplifier two output. B1 SDA I 2C serial interface data input. B2 BYPASS The internal V DD/2 ac bypass node. B3 CNTGND In OCL mode, this is the ac ground return. It is biased to V DD/2. Leave unconnected for C-CUPL mode. C1 SCL I2C serial interface clock input. C2 GND The LM4985’s power supply ground input. C3 V DD The LM4985’s power supply voltage input. D1 I 2CV DD I 2C serial interface power supply input. Can be connected to the same supply that is connected to the V DD pin. D2 IN1 Analog signal input one. D3 OUT1 Power amplifier one output. www.national.com 4 |
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