IC41C4100 datasheet(9/21 Pages) ICSI

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IC41C4100

IC41LV4100

Integrated Circuit Solution Inc.

DR027-0A 09/05/2001

AC CHARACTERISTICS (Continued)(1,2,3,4,5,6)

(Recommended Operating Conditions unless otherwise noted.)

-50

-60

Symbol

Parameter

Min. Max.

Units

tACH

Column-Address Setup Time to

CAS

—

Precharge during WRITE Cycle

tOEH

OE Hold Time from WE during

—

READ-MODIFY-WRITE cycle(18)

tDS

Data-In Setup Time(15, 22)

0—

—

tDH

Data-In Hold Time(15, 22)

6—

8—

—

tRWC

READ-MODIFY-WRITE Cycle Time

—

125

—

140

—

tRWD

RAS to WE Delay Time during

—

READ-MODIFY-WRITE Cycle(14)

tCWD

CAS to WE Delay Time(14, 20)

—

tAWD

Column-Address to

WE Delay Time(14)

—

tPC

EDO Page Mode READ or WRITE

—

Cycle Time(24)

tRASP

RAS Pulse Width in EDO Page Mode

100K

tCPA

Access Time from

CAS Precharge(15)

—21

—

tPRWC

EDO Page Mode READ-WRITE

—

Cycle Time(24)

tCOH

Data Output Hold after

CAS LOW

5—

—

tOFF

Output Buffer Turn-Off Delay from

CAS or RAS(13,15,19, 29)

tWHZ

Output Disable Delay from

315

tCLCH

Last

CAS going LOW to First CAS

—

returning HIGH(23)

tCSR

CAS Setup Time (CBR REFRESH)(30, 20)

8—

—

tCHR

CAS Hold Time (CBR REFRESH)(30, 21)

8—

—

tORD

OE Setup Time prior to RAS during

—

HIDDEN REFRESH Cycle

tREF

Refresh Period (512 Cycles)

—

Transition Time (Rise or Fall)(2, 3)

150

AC TEST CONDITIONS

Output load:

Two TTL Loads and 50 pF (Vcc = 5.0V ±10%)

One TTL Load and 50 pF (Vcc = 3.3V ±10%)

Input timing reference levels: VIH = 2.4V, VIL = 0.8V (Vcc = 5.0V ±10%);

VIH = 2.0V, VIL = 0.8V (Vcc = 3.3V ±10%)

Output timing reference levels: VOH = 2.0V, VOL = 0.8V (Vcc = 5V ±10%, 3.3V ±10%)

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