Philips Semiconductors

Product specification

74F157A, 74F158A

Data selectors/multiplexers

74F157A:

Quad 2-input data selector/multiplexer, non-inverting

74F158A:

Quad 2-input data selector/multiplexer, inverting

2

1996 Mar 12

853-0346 16555

DESCRIPTION

The 74F157A is a high speed Quad 2-Input Multiplexer which

selects 4 bits of data from one of two sources under the control of a

common Select input (S). The Enable input (E) is active when Low.

When E is High, all of the outputs (Yn) are forced Low regardless of

all other input conditions.

Moving data from two registers to a common output bus is a

common use of the 74F157A. The state of the Select input

determines the particular register from which the data comes.

The device is the logic implementation of a 4-pole, 2-position switch

where the position of the switch is determined by the logic levels

supplied to the Select input.

The 74F158A is similar, but has inverting outputs (Yn).

74F157A

TYPE

TYPICAL

PROPAGATION

DELAY

TYPICAL

SUPPLY CURRENT

(TOTAL)

74F157

4.6ns

15mA

74F157A

4.6ns

15mA

74F158

3.7ns

10mA

74F158A

3.7ns

10mA

ORDERING INFORMATION

ORDER CODE

DESCRIPTION

COMMERCIAL RANGE

INDUSTRIAL RANGE

PKG. DWG. #

16-pin plastic DIP

N74F157AN, N174F158AN

I74F157AN

SOT38-4

16-pin plastic SO

N74F157AD, N74F158AD

I74F157AD

SOT109-1

INPUT AND OUTPUT LOADING AND FAN OUT TABLE

PINS

DESCRIPTION

74F (U.L.) HIGH/LOW

LOAD VALUE HIGH/LOW

Ina, Inb, Inc, Ind

Data inputs

1.0/1.0

20

µA/0.6mA

S

Select input

1.0/1.0

20

µA/0.6mA

E

Enable input

1.0/1.0

20

µA/0.6mA

Ya–Yd

Data outputs (74F157/74F157A)

50/33

1.0mA/20mA

Ya–Yd

Data outputs (74F158/74F158A)

50/33

1.0mA/20mA

NOTE: One (1.0) FAST unit load is defined as: 20

µA in the High state and 0.6mA in the Low state.

PIN CONFIGURATIONS, 74F157A

74F158A

16

15

14

13

12

11

10

7

6

5

4

3

2

1

Yb

Yd

I0c

I1c

I1d

E

I0d

S

I0a

I1b

I1a

Ya

I0b

9

8

GND

Yc

SF00215

16

15

14

13

12

11

10

7

6

5

4

3

2

1

Yb

Yd

I0c

I1c

I1d

E

I0d

S

I0a

I1b

I1a

Ya

I0b

9

8

GND

Yc

SF00216

LOGIC SYMBOLS, 74F157A

74F158A

GND = Pin 8

SF00217

1

15

S

E

2356

11

10

14

I0a

I1a

I0b

I1b

I0c

I1c

I0d

Ya

Yb

Yc

Yd

479

12

13

I1d

GND = Pin 8

SF00218

1

15

S

E

2356

11

10

14

I0a

I1a

I0b

I1b

I0c

I1c

I0d

Ya

Yb

Yc

Yd

479

12

13

I1d