LSF0102DDFR datasheet(23/57 Pages) TI

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10 Power Supply Recommendations

There are no power sequence requirements for the LSF family. Table 10-1 provides recommended operating

voltages for all supply and input pins.

Table 10-1. Recommended Operating Voltages

PARAMETER

MIN

TYP

MAX

UNIT

Vref_A(1)

reference voltage (A)

0.95

5.0

Vref_B

reference voltage (B)

Vref_A + 0.8

5.0

VI(EN)

input voltage on EN pin

Vref_A + 0.8

5.0

Vpu

pull-up supply voltage

Vref_B

(1)

Vref_A is required to be the lowest voltage level across all inputs and outputs.

11 Layout

11.1 Layout Guidelines

Because the LSF family is a switch-type level translator, the signal integrity is highly related with a pull-up

resistor and PCB capacitance condition.

• Short signal trace as possible to reduce capacitance and minimize stub from pull-up resistor.

• Place LSF close to high voltage side.

• Select the appropriate pull-up resistor that applies to translation levels and driving capability of transmitter.

11.2 Layout Example

GND

Vref_A

Vref_B

Short Signal Trace as possible

Minimize Stub as possible

Figure 11-1. Short Trace Layout

Device PCB

TP1

SD Controller

(1.8 V IO)

TP2

LSF0108

SDIO level translator

SDIO Connnector

(3.3 V IO)

Figure 11-2. Device Placement

www.ti.com

LSF0108

SDLS966L – DECEMBER 2013 – REVISED DECEMBER 2022

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