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VIPER267KDTR 데이터시트(PDF) 18 Page - STMicroelectronics

부품명 VIPER267KDTR
상세설명  1050 V high voltage converter for ultra-wide input
PDF  28 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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VIPER267KDTR 데이터시트(HTML) 18 Page - STMicroelectronics

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General description
VIPER26K
18/28
DS12978 Rev 1
Figure 24. Timing diagram: OLP sequence
4.11
Open loop failure protection
In case the power supply is built in flyback topology and the VIPer26K is supplied by an
auxiliary winding, the converter is protected against feedback loop failure or accidental
disconnections of the winding.
If RH is opened or RL is shorted, the VIPer26K works at its drain current limitation. The
output voltage, VOUT, increases and also the auxiliary voltage, VAUX, which is coupled with
the output through the secondary-to-auxiliary turns ratio.
As the auxiliary voltage increases up to the internal VDD active clamp, VDDclamp and the
clamp current injected on the VDD pin exceeds the latch threshold, IDDol, a fault signal is
internally generated.
In order to distinguish an actual malfunction from a bad auxiliary winding design, both the
above conditions (drain current equal to the drain current limitation and current higher than
IDDol through VDD clamp) have to be verified to reveal the fault.
If RL is opened or RH is shorted, the output voltage, VOUT, is clamped to the reference
voltage VREF_FB (in case of non-isolated flyback) or to the external TL voltage reference (in
case of isolated flyback).
4.12
Thermal shutdown
When the controller temperature exceeds the shutdown threshold, TSD, the device is shut
down to prevent any dangerous overheating for the system and the VDD pin is continuously
recycled between VDDon and VDDoff to keep the controller alive.
Once the tRESTART time is elapsed, when temperature falls THYST below the OTP threshold,
the IC starts once it has reached again the VDDon.
The OTP timing diagram is shown in Figure 25.



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