EM6620WS27 datasheet(19/56 Pages) EMMICRO

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EM6620

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6.4.4 PWM and Frequency output

PB[3] can also be used to output the PWM (Pulse Width Modulation) signal from the 10-Bit Counter, the

Ck[16], Ck[11] as well as the Ck[1] prescaler frequencies.

-Selecting ck[16] output on PB[0] with bit PB32kHzOut in register OPTSelPB

-Selecting ck[11] output on PB[1] with bit PB2kHzOut in register OPTSelPB

-Selecting ck[1 ] output on PB[2] with bit PB1HzOut

in register OPTSelPB

-Selecting PWM output on PB[3] with bit PWMOn

in register RegPresc.

6.5 PB[0] Dynamic Input Comparator

The EM6620 has one dynamic input comparator on PB[0], such that PB[0] input voltage level is compared at

regular intervals (ck[12] clock period) with the SVLD detection level (default : 2.0V).

To select this function, the bit PB0CompSelect in register RegPB0Comp must be set to “1. If using the

Dynamic Input Comparator one must put the PB[0] in CMOS input mode and should not use any pull resistor

on this terminal.

The Comparator shares the same internal block as the SVLD function, so one can only use one or the other

function at the same time. With bit PB0CompSelect set to ‘1’ the Comparator is chosen, ‘0’ selects the SVLD.

Setting the bit PB0CompEnable to “1“ enables the measurements.

The worst case first measurement time is :

ck[9] clock period + ck[14] clock period (synchronization + effective measurement)

(32kHz -> 4.125ms)

The time between two consecutive effective measurements is equal to 3 ck[14] clock periods. The

measurement stops at the end of the next measurement cycle after PB0CompEnable is cleared. At the end of

each measurement, the result is stored in PB0CompResult bit. At any time during the measurement

PB0CompResult bit can be read : If the result is

- “0“, the input level is greater than the detection level

- “1“, the input level is lower

than the detection level.

An interrupt request IRQPB0Comp is generated on each result change except after the first measurement.

This interrupt request can be masked (default) (MaskIRQPB0Comp bit). See section 9 for more information

about the interrupt handling. See also section Supply Voltage Level Detector on page 33.

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