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STE2001 데이터시트(PDF) 12 Page - STMicroelectronics |
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STE2001 데이터시트(HTML) 12 Page - STMicroelectronics |
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12 / 36 page ![]() STE2001 12/36 - Display blank (E = D = 0) - Address counter X[6: 0] = 0 and Y[3 : 0] = 0 - Temperature coefficient (TC[1 : 0] = 0) - Bias system (BS[2 : 0] = 0) -VOP =0 - Power Down (PD = 1) To clear the RAM content a MEMORY BLANK instruction should be executed. Power Down (PD = 1) When at Power Down, all LCD outputs are kept at VSS (display off). Bias generator and VLCD generator are OFF (VLCDOUToutput is discharged to VSS, and then is possible to disconnect VLCDOUT). The internal Oscillator is in off state. An external clock can be provided. The RAM contents is not cleared. Charge Pump Factor The desired Charge Pump Multiplication Factor can be programmed though the S1 and S0 bits, as follows: At Reset the X2 factor is selected. Bias Levels To properly drive the LCD, six (Including VLCD and VSS) different voltage (Bias) levels are generated. The ra- tios among these levels and VLCD, should be selected according to the MUX ratio (m). They are established to be (Fig. 14): Figure 13. Bias level Generator S1 S0 Multi plication Factor 00 2X 01 3X 10 4X 11 5X V LCD n3 + n4 + ------------- V LCD , n2 + n4 + ------------- V LCD , 2 n4 + ------------- V LCD, 1 n4 + ------------- V LCD,VSS , R VLCD VSS ·VLCD ·VLCD ·VLCD ·VLCD n+ 3 n+ 4 R nR R R n+ 2 n+ 4 2 n+ 4 1 n+ 4 D00IN1150 |
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