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STW5093 데이터시트(PDF) 24 Page - STMicroelectronics |
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STW5093 데이터시트(HTML) 24 Page - STMicroelectronics |
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24 / 34 page ![]() STw5093 24/34 Note 5: A signal is valid if it is above VIH or below VIL and invalid if it is between VIL and VIH. For the purposes of this specification the following conditions apply: a) All input signal are defined as: VIL = 0.2VCCIO, VIH = 0.8VCCIO, tR < 10ns, tF < 10ns. b) Delay times are measured from the inputs signal valid to the output signal valid. c) Setup times are measured from the data input valid to the clock input invalid. d) Hold times are measured from the clock signal valid to the data input invalid. ELECTRICAL CHARACTERISTICS (unless otherwise specified, VCCIO = 1.8V to 3.3V, Tamb = -30°C to 85°C; typical characteristic are specified at VCCIO = 3.0V, Tamb = 25°C ; all signals are referenced to GND) DIGITAL INTERFACES tDDZ Delay Time CS-high or 8th CCLK low to CO high impedance whichever comes first 10 80 ns tHSC Hold Time, 8th CCLK high to CS- high 100 ns tSCS Set up Time, CS- high to CCLK high 100 ns Symbol Parameter Test Condition Min. Typ. Max. Unit VIL Input Low Voltage All digital inputs except REMIN DC AC 0.3VCCIO 0.2VCCIO V V VIH Input High Voltage All digital inputs except REMIN DC AC 0.7VCCIO 0.8VCCIO V V VILREM Input Low Voltage REMIN input 0.5 V VIHREM Input High Voltage REMIN input 1.4 V VOL Output Low Voltage All digital outputs, IL = 10 µA All digital outputs, IL = 2mA 0.1 0.4 V V VOH Output High Voltage All digital outputs, IL = 10 µA All digital outputs, IL = 2mA VCCIO-0.1 VCCIO-0.4 V V IIL Input Low Current Any digital input, GND < VIN < VIL -10 10 µA IIH Input High Current Any digital input, VIH < VIN < VCCIO -10 10 µA IOZ Output Current in High impedance (Tri-state) DX and CO -10 10 µA Symbol Parameter Test Condition Min. Typ. Max. Unit TIMING SPECIFICATIONS (continued) SERIAL CONTROL PORT TIMING (continued) |
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