6

Instructions

Each command is composed of bytes (MSBit transmitted first), initiated with the instruction byte, as summarized

in Table 4.

If an invalid instruction is sent (one not contained in Table 4), the device automatically enters in a Wait state until

deselected.

Table 4. Instruction set

Instruction

Description

Instruction format

WREN

Write enable

0000 0110

WRDI

Write disable

0000 0100

RDSR

Read Status register

0000 0101

WRSR

Write Status register

0000 0001

READ

Read from Memory array

0000 0011

WRITE

Write to Memory array

0000 0010

RDID (1)

Read Identification page

1000 0011

WRID(1)

Write Identification page

1000 0010

RDLS(1)

Reads the Identification page lock status

1000 0011

LID(1)

Locks the Identification page in read-only mode

1000 0010

1. Instruction available only for the M95128-D device.

For read and write commands to memory array and Identification page the address is defined by two bytes as

explained in Table 5.

Table 5. Significant bits within the address bytes

Instruction

MSB address byte

LSB address byte

b15

b14

b13

b12

b11

b10

b9

b8

b7

b6

b5

b4

b3

b2

b1

b0

READ

or WRITE

x

x

A13

A12

A11

A10

A9

A8

A7

A6

A5

A4

A3

A2

A1

A0

RDID

or WRID

0

0

0

0

0

0

0

0

0

0

A5

A4

A3

A2

A1

A0

RDLS

or LID

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

Note:

A: Significant address bit.

x: bit is Don’t care.

M95128-W M95128-R M95128-DF

Instructions

DS1356 - Rev 20

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