M68AW256M datasheet(17/23 Pages) STMICROELECTRONICS

부품명	M68AW256M

상세설명	4 Mbit (256K x16) 3.0V Asynchronous SRAM

PDF	23 Pages

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제조업체	STMICROELECTRONICS [STMicroelectronics]

홈페이지	http://www.st.com

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M68AW256M

Figure 14. Low VCC Data Retention AC Waveforms

Table 9. Low VCC Data Retention Characteristics

Note: 1. All other Inputs at VIH ≥ VCC –0.2V or VIL ≤ 0.2V.

2. Tested initially and after any design or process changes that may affect these parameters. tAVAV is Read cycle time.

3. No input may exceed VCC +0.2V.

Symbol

Parameter

Test Condition

Min

Typ

Max

Unit

ICCDR

(1)

Supply Current (Data Retention)

VCC = 1.5V, E ≥ VCC –0.2V or

UB = LB

≥ VCC –0.2V, f = 0 (3)

4.5

µA

tCDR

(1,2)

Chip Deselected to Data

Retention Time

0ns

(2)

Operation Recovery Time

tAVAV

VDR

(1)

Supply Voltage (Data Retention)

≥ VCC –0.2V or

UB = LB

≥ VCC –0.2V, f = 0

1.5

AI03989

DATA RETENTION MODE

3.6V

tCDR

VCC

2.7V

VDR > 1.5V

≥ VDR – 0.2V or UB=LB ≥ VDR – 0.2V

E, UB/LB

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