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74HC7404D 데이터시트(PDF) 18 Page - NXP Semiconductors |
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74HC7404D 데이터시트(HTML) 18 Page - NXP Semiconductors |
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18 / 28 page ![]() September 1993 18 Philips Semiconductors Product specification 5-Bit x 64-word FIFO register; 3-state 74HC/HCT7404 Shift-out operation; high-speed burst mode Note to Fig.13 In the high-speed mode, the burst-out rate is determined by the minimum shift-out HIGH and shift-out LOW specifications. The DOR flag is a don't care condition and an SO pulse can be applied without regard to the flag. Fig.13 Waveforms showing SO minimum pulse width and maximum pulse frequency, in high-speed shift-out burst mode. handbook, full pagewidth MGA663 VM (1) SO INPUT Qn OUTPUT 1/f max tW DOR OUTPUT (1) HC : VM = 50%; VI = GND to VCC. HCT : VM = 1.3 V; VI = GND to 3 V. |
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