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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ST72334J 데이터시트(PDF) 27 Page - STMicroelectronics |
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ST72334J 데이터시트(HTML) 27 Page - STMicroelectronics |
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27 / 125 page  ST72334J/N, ST72314J/N, ST72124J 27/125 RESET SEQUENCE MANAGER (Cont’d) External RESET pin The RESET pin is both an input and an open-drain output with integrated RON weak pull-up resistor. This pull-up has no fixed value but varies in ac- cordance with the input voltage. It can be pulled low by external circuitry to reset the device. A RESET signal originating from an external source must have a duration of at least tPULSE in order to be recognized. Two RESET sequences can be associated with this RESET source as shown in Figure 16. Starting from the external RESET pulse recogni- tion, the device RESET pin acts as an output that is pulled low during at least tDELAYmin. Figure 16. External RESET Sequences RESET RUN DELAY INTERNAL RESET 4096 CLOCK CYCLES FETCH VECTOR RUN RESET PIN EXTERNAL RESET SOURCE tPULSE VDD VLVDf VDDnominal WATCHDOG RESET RESET RUN INTERNAL RESET 4096 CLOCK CYCLES FETCH VECTOR RUN RESET PIN EXTERNAL RESET SOURCE tPULSE WATCHDOG RESET DELAY VDD VLVDf VDDnominal tDELAYmin |
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