74LVC04AD datasheet(2/10 Pages) PHILIPS

2 / 10 page

Philips Semiconductors

Product specification

74LVC04A

Hex inverter

1997 Jun 30

853-1953 18162

FEATURES

• Wide supply range of 1.2V to 3.6V

• Complies with JEDEC standard no. 8-1A

• Inputs accept voltages up to 5.5V

• CMOS low power consumption

• Direct interface with TTL levels

• 5-volt tolerant inputs, for interfacing with 5-volt logic

DESCRIPTION

The 74LVC04A is a high-performance, low-power, low-voltage,

Si-gate CMOS device and superior to most advanced CMOS

compatible TTL families.

Inputs can be driven from either 3.3 V or 5 V devices. This feature

allows the use of these devices as translators in a mixed 3.3 V/5 V

environment.

The 74LVC04A provides six inverting buffers.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25°C; tr = tf v2.5 ns

SYMBOL

PARAMETER

CONDITIONS

TYPICAL

UNIT

tPHL/tPLH

Propagation delay

nA to nY

CL = 50 pF;

VCC = 3.3 V

2.5

Input capacitance

5.0

CPD

Power dissipation capacitance per gate

Notes 1 and 2

NOTES:

1. CPD is used to determine the dynamic power dissipation (PD in µW)

PD = CPD

VCC2 x fi ) (CL

VCC2

fo) where:

fi = input frequency in MHz; CL = output load capacity in pF;

fo = output frequency in MHz; VCC = supply voltage in V;

(CL

VCC2

fo) = sum of the outputs.

2. The condition is VI = GND to VCC.

ORDERING INFORMATION

PACKAGES

TEMPERATURE RANGE

OUTSIDE NORTH AMERICA

NORTH AMERICA

DWG NUMBER

14-Pin Plastic SO

–40

°C to +85°C

74LVC04A D

SOT108-1

14-Pin Plastic SSOP Type II

–40

°C to +85°C

74LVC04A DB

SOT337-1

14-Pin Plastic TSSOP Type I

–40

°C to +85°C

74LVC04A PW

74LVC04APW DH

SOT402-1

PIN CONFIGURATION

GND

SV00396

PIN DESCRIPTION

PIN NUMBER

SYMBOL

NAME AND FUNCTION

1, 3, 5, 9, 11, 13

1A to 6A

Data inputs

2, 4, 6, 8, 10, 12

1Y to 6Y

Data outputs

GND

Ground (0 V)

VCC

Positive supply voltage

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