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MMDF3N06VLR2 데이터시트(PDF) 1 Page - ON Semiconductor |
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MMDF3N06VLR2 데이터시트(HTML) 1 Page - ON Semiconductor |
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1 / 4 page ![]() © Semiconductor Components Industries, LLC, 2004 April, 2004 − Rev. 2 1 Publication Order Number: MMDF3N06VL/D MMDF3N06VL Power MOSFET 3 Amps, 60 Volts N−Channel SO−8, Dual Designed for low voltage, high speed switching applications in power supplies, converters and power motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients. Features • On−resistance Area Product about One−half that of Standard MOSFETs with New Low Voltage, Low RDS(on) Technology • Faster Switching than E−FETt Predecessors • Avalanche Energy Specified • I DSS and VDS(on) Specified at Elevated Temperature • Static Parameters are the Same for both TMOS V and TMOS E−FET • Miniature SO−8 Surface Mount Package − Saves Board Space • Mounting Information for SO−8 Package Provided MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Drain−to−Source Voltage VDSS 60 Vdc Drain−to−Gate Voltage, (RGS = 1 MΩ) VDGR 60 Vdc Gate−to−Source Voltage − Continuous VGS ± 15 Vdc Drain Current − Continuous @ TA = 25°C Drain Current − Continuous @ TA = 100°C Drain Current − Single Pulse (tp ≤ 10 ms) ID ID IDM 3.3 0.7 10 Adc Apk Total Power Dissipation @ TA = 25°C (Note 1) PD 2.0 W Operating and Storage Temperature Range TJ, Tstg − 55 to 150 °C Single Pulse Drain−to−Source Avalanche Energy − Starting TJ = 25°C (VDD = 25 Vdc, VGS = 5.0 Vdc, Peak IL = 3.3 Apk, L = 10 mH, RG = 25 Ω) EAS 54 mJ Thermal Resistance, Junction to Ambient (Note 1) RθJA 62.5 °C/W Maximum Lead Temperature for Soldering Purposes, 0.0625 ″ from case for 10 seconds TL 260 °C 1 Mounted on G10/FR4 glass epoxy board using minimum recommended footprint. Source−1 1 2 3 4 8 7 6 5 Top View Gate−1 Source−2 Gate−2 Drain−1 Drain−1 Drain−2 Drain−2 Device Package Shipping† ORDERING INFORMATION MMDF3N06VLR2 SO−8 2500 Tape & Reel SO−8 CASE 751 STYLE 11 N−Channel MARKING DIAGRAM D S G PIN ASSIGNMENT http://onsemi.com VDSS RDS(ON) TYP ID MAX 60 V 130 m Ω 3.0 A †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. 1 8 3N06V ALYW 1 8 A = Assembly Location L = Wafer Lot Y = Year W = Work Week |
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