74LVC138AD datasheet(2/10 Pages) PHILIPS

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Philips Semiconductors

Product specification

74LVC138A

3-to-8 line decoder/demultiplexer; inverting

1998 Apr 28

853–1943 19308

FEATURES

• Wide supply voltage range of 1.2 to 3.6 V

• In accordance with JEDEC standard no. 8-1A

• Inputs accept voltages up to 5.5 V

• CMOS lower power consumption

• Direct interface with TTL levels

• Demultiplexing capability

• Multiple input enable for easy expansion

• Ideal for memory chip select decoding

• Active LOW mutually exclusive outputs

• Output drive capability 50 W transmission lines at 85°C

DESCRIPTION

The 74LVC138A is a low-voltage, low-power, high-performance

Si-gate CMOS device, superior to most advanced CMOS

compatible TTL families.

The 74LVC138A accepts three binary weighted address inputs (A0,

A1, A2) and when enabled, provides 8 mutually exclusive active

LOW outputs (Y0 to Y7).

The 74LVC138A features three enable inputs: two active LOW (E1

and E2) and one active HIGH (E3). Every output will be HIGH unless

E1 and E2 are LOW and E3 is HIGH.

This multiple enable function allows easy parallel expansion of the

74LV138A to a 1-of-32 (5 lines to 32 lines) decoder with just four

74LV138A ICs and one inverter. The 74LV138A can be used as an

eight output demultiplexer by using one of the active LOW enable

inputs as the data input and the remaining enable inputs as strobes.

Unused enable inputs must be permanently tied to their appropriate

active HIGH or LOW state.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns

SYMBOL

PARAMETER

CONDITIONS

TYPICAL

UNIT

tPHL/tPLH

Propagation delay

An to Yn,

E3 to Yn, En to Yn

CL = 50 pF;

VCC = 3.3 V

3.5

Input capacitance

5.0

CPD

Power dissipation capacitance per

package

VCC = 3.3 V

Notes 1 and 2

NOTES:

1. CPD is used to determine the dynamic power dissipation (PD in µW)

PD = CPD × VCC2 × fi ) (CL × VCC2 × fo) where:

fi = input frequency in MHz; CL = output load capacity in pF;

fo = output frequency in MHz; VCC = supply voltage in V;

(CL × VCC2 × fo) = sum of the outputs.

2. The condition is VI = GND to VCC

ORDERING INFORMATION

PACKAGES

TEMPERATURE RANGE

OUTSIDE NORTH AMERICA

NORTH AMERICA

PKG. DWG. #

16-Pin Plastic SO

–40

°C to +85°C

74LVC138A D

SOT109-1

16-Pin Plastic SSOP Type II

–40

°C to +85°C

74LVC138A DB

SOT338-1

16-Pin Plastic TSSOP Type I

–40

°C to +85°C

74LVC138A PW

74LVC138APW DH

SOT403-1

PIN CONFIGURATION

SV00553

GND

VCC

LOGIC DIAGRAM

SV00554

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