Configuration

Table 12.

Configuration Features

Feature

Description

Dual configuration

• Stores two configuration images in the configuration flash memory (CFM)

• Selects the first configuration image to load using the CONFIG_SEL pin

Design security

• Supports 128-bit key with non-volatile key programming

• Limits access of the JTAG instruction during power-up in the JTAG secure mode

• Unique device ID for each Intel MAX 10 device

SEU Mitigation

• Auto-detects cyclic redundancy check (CRC) errors during configuration

• Provides optional CRC error detection and identification in user mode

Dual-purpose configuration

pin

• Functions as configuration pins prior to user mode

• Provides options to be used as configuration pin or user I/O pin in user mode

Configuration data

compression

• Decompresses the compressed configuration bitstream data in real-time during

configuration

• Reduces the size of configuration image stored in the CFM

Instant-on

Provides the fastest power-up mode for Intel MAX 10 devices.

Table 13.

Configuration Schemes for Intel MAX 10 Devices

Configuration Scheme

Compression

Encryption

Dual Image

Configuration

Data Width

Internal Configuration

Yes

Yes

Yes

—

JTAG

—

—

—

1

Power Management

Table 14.

Power Options

Power Options

Advantage

Single-supply device

Saves board space and costs.

Dual-supply device

• Consumes less power

• Offers higher performance

Power management

controller scheme

• Reduces dynamic power consumption when certain applications are in standby mode

• Provides a fast wake-up time of less than 1 ms.

Document Revision History for Intel MAX 10 FPGA Device Overview

Document

Version

Changes

2021.11.01

• Updated the Sample Ordering Code and Available Options for Intel MAX 10 Devices diagram.

— Added SL and DD feature options, Y package type, and 180 package code.

— Removed –I6 speed grade from contact information. All OPNs for –I6 speed grade are available

in the Intel Quartus Prime Standard Edition software version 21.1 onwards.

• Added V81 and Y180 packages in the Package Plan for Intel MAX 10 Single Power Supply Devices

table.

• Added Y180 package in the Migration Capability Across Intel MAX 10 Devices diagram.

Intel® MAX® 10 FPGA Device Overview

683658 | 2021.11.01

Send Feedback

Intel® MAX® 10 FPGA Device Overview

13