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7LVC244APWDH 데이터시트(PDF) 6 Page - NXP Semiconductors

부품명 7LVC244APWDH
상세설명  Octal buffer/line driver with 5-volt tolerant inputs/outputs 3-Statetitle
PDF  10 Pages
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제조업체  PHILIPS [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

7LVC244APWDH 데이터시트(HTML) 6 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74LVC244A
74LVCH244A
Octal buffer/line driver with 5-volt
tolerant inputs/outputs (3-State)
1998 May 20
6
AC CHARACTERISTICS
GND = 0V; tr = tf v 2.5ns; CL = 50pF; RL = 500Ω; Tamb = –40°C to +85°C.
LIMITS
SYMBOL
PARAMETER
WAVEFORM
VCC = 3.3V ±0.3V
VCC = 2.7V
VCC = 1.2V
UNIT
MIN
TYP1
MAX
MIN
MAX
TYP
tPHL
tPLH
Propagation delay
1An to 1Yn;
2An to 2Yn
1, 3
1.5
3.5
5.9
1.5
6.9
16.0
ns
tPZH
tPZL
3-State output enable time
1OE to 1Yn;
2OE to 2Yn
2, 3
1.5
4.3
7.6
1.5
8.6
19.0
ns
tPHZ
tPLZ
3-State output disable time
1OE to 1Yn;
2OE to 2Yn
2, 3
1.5
3.7
5.8
1.5
6.8
17.0
ns
NOTE:
1. Unless otherwise stated, all typical values are at VCC = 3.3V and Tamb = 25°C.
AC WAVEFORMS
VM = 1.5 V at VCC w 2.7 V; VM = 0.5 VCC at VCC < 2.7 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
VX = VOL + 0.3V at VCC ≥ 2.7V; VX = VOL + 0.1 VCC at VCC < 2.7V
VY = VOH – 0.3V at VCC ≥ 2.7V; VY = VOH – 0.1 VCC at VCC < 2.7V
SY00041
INPUT
VM
tPHL
tPLH
VOL
VI
VM
GND
VOH
OUTPUT
Waveform 1. Input (Dn) to output (Qn) propagation delays.
tPLZ
tPZL
VI
nOE INPUT
GND
VCC
Qn OUTPUT
LOW-to-OFF
OFF-to-LOW
VOL
VOH
Qn OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
outputs
enabled
outputs
enabled
outputs
disabled
tPHZ
VM
VM
VM
tPZH
VX
VY
SW00207
Waveform 2. 3-State enable and disable times.
TEST CIRCUIT
PULSE
GENERATOR
RT
VIN
D.U.T.
VOUT
CL
VCC
RL=500 Ω
SWITCH POSITION
TEST
SWITCH
tPLH/tPHL
Open
tPLZ/tPZL
2
<VCC
tPHZ/tPZH
GND
Test Circuit for 3-State Outputs
Open
GND
S1
2
<VCC
DEFINITIONS
VCC
t 2.7V
2.7 – 3.6V
VIN
VCC
2.7V
RL = Load resistor
CL = Load capacitance includes jig and probe capacitance
RT = Termination resistance should be equal to ZOUT
of pulse generators.
SW00047
RL=500 Ω
Waveform 3. Load circuitry for switching times.



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