74LVC32APWDH datasheet(2/10 Pages) PHILIPS

2 / 10 page

Philips Semiconductors

Product specification

74LVC32A

Quad 2-input OR gate

1997 Jun 30

853-1995 18166

FEATURES

• Wide supply voltage range of 1.2 V to 3.6 V

• In accordance with JEDEC standard no. 8-1A.

• Inputs accept voltages up to 5.5 V

• CMOS low power consumption

• Direct interface with TTL levels

DESCRIPTION

The 74LVC32A is a high-performance, low-power, low-voltage

Si-gate CMOS device and superior to most advanced CMOS

compatible TTL families.

Inputs can be driven from either 3.3V or 5V devices. This feature

allows the use of these devices as translators in a mixed 3.3V/5V

environment.

The 74LVC32A provides the 2-input OR function.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns

SYMBOL

PARAMETER

CONDITIONS

TYPICAL

UNIT

tPHL/tPLH

Propagation delay

nA, nB to nY

CL = 50 pF;

VCC = 3.3 V

2.6

Input capacitance

5.0

CPD

Power dissipation capacitance per gate

Notes 1 and 2

NOTES:

1. CPD is used to determine the dynamic power dissipation (PD in µW)

PD = CPD × VCC2 × fi ) (CL × VCC2 × fo) where:

fi = input frequency in MHz; CL = output load capacity in pF;

fo = output frequency in MHz; VCC = supply voltage in V;

(CL × VCC2 × fo) = sum of the outputs.

2. The condition is VI = GND to VCC.

ORDERING INFORMATION

PACKAGES

TEMPERATURE RANGE

OUTSIDE NORTH AMERICA

NORTH AMERICA

DWG NUMBER

14-Pin Plastic SO

–40

°C to +85°C

74LVC32A D

SOT108-1

14-Pin Plastic SSOP Type II

–40

°C to +85°C

74LVC32A DB

SOT337-1

14-Pin Plastic TSSOP Type I

–40

°C to +85°C

74LVC32A PW

74LVC32APW DH

SOT402-1

PIN CONFIGURATION

GND

SV00450

PIN DESCRIPTION

PIN NUMBER

SYMBOL

NAME AND FUNCTION

1, 4, 9, 12

1A – 4A

Data inputs

2, 5, 10, 13

1B – 4B

Data inputs

3, 6, 8, 11

1Y – 4Y

Data outputs

GND

Ground (0 V)

VCC

Positive supply voltage

74LVC32APWDH 데이터시트(PDF) 2 Page - NXP Semiconductors

74LVC32APWDH 데이터시트(HTML) 2 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10

데이터시트 다운로드

링크 URL