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STM32H7B0IB 데이터시트(PDF) 193 Page - STMicroelectronics |
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STM32H7B0IB 데이터시트(HTML) 193 Page - STMicroelectronics |
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193 / 205 page ![]() Revision history Table 135. Document revision history Date Revision Changes 20-Dec-2019 1 Initial release. 27-Apr-2020 2 Updated Octo-SPI interface in Table 1. STM32H7B0xB features and peripheral counts. Updated Figure 2. Power-up/power-down sequence in Section 6.1.6 Power supply scheme. Updated HSLV feature description in Section 3.8 General-purpose input/outputs (GPIOs). In Section 5 Pin descriptions: updated Table 6. Legend/abbreviations used in the pinout table; changed SPDIFRX into SPDIFRX1 and updated all SPDIFRX1 pin names. Updated Table 17. Voltage characteristics to add VREF+ in the list of external main supply voltage. Removed clock frequencies from Table 20. General operating conditions and added new Section 6.3.1 . Changed condition for tRSTTEMPO in Table 27. Reset and power control block characteristics. Added IDD50USB in Table 30. USB regulator characteristics. Updated Table 38. Typical current consumption in System Stop mode, added Table 39. Typical current consumption RAM shutoff in Stop mode, and added IWDG and changed SPDIFRX into SPDIFRX1 in Table 42. Peripheral current consumption in Run mode. Table 56. Flash memory programming: updated tME description and unit. In the whole Section 6.3.18 FMC characteristics, replaced sentence "the TKERCK is the fmc_ker_ck clock period" by "the Tfmc_ker_ck is the kernel clock period". Section 6.3.19 Octo-SPI interface characteristics: added parameter measurement conditions, updated Table 88. OCTOSPI characteristics in SDR mode and Table 89. OCTOSPI characteristics in DTR mode (with DQS)/Octal and Hyperbus, updated Figure 42. OctoSPI Hyperbus clock, Figure 43. OctoSPI Hyperbus read and Figure 44. OctoSPI Hyperbus write. Updated Figure 48. Power supply and reference decoupling (VREF+ not connected to VDDA), note 1. and note 1.. Section 6.3.30 Digital filter for Sigma-Delta Modulators (DFSDM) characteristics, Section 6.3.31 Camera interface (DCMI) timing specificationsSection 6.3.33 LCD-TFT controller (LTDC) characteristics, Section 6.3.36.2 USART interface characteristics, Section 6.3.36.3 SPI interface characteristics, Section 6.3.36.4 I2S Interface characteristics, Section 6.3.36.5 SAI characteristics, Section 6.3.36.7 SD/SDIO MMC card host interface (SDMMC) characteristics, Section 6.3.36.8 USB OTG_FS characteristics, Section 6.3.36.9 USB OTG_HS characteristics, Section 6.3.36.10 JTAG/SWD interface characteristics: changed VOS level to VOS0 in the parameter measurement conditions. 08-Jul-2020 3 Updated note related to ULPI interface availability on packages that do not feature PC2 and PC3 I/Os in Table 1. STM32H7B0xB features and peripheral counts. Updated Table 18. Current characteristics, Table 19. Thermal characteristics and Figure 13. Current consumption measurement scheme. Updated Figure 12. Power supply scheme. Added note to VREFINT in Table 28. Embedded reference voltage.Added Table 31. Inrush current and inrush electric charge characteristics for LDO and SMPS. Updated Table 44. Low-power mode wakeup timings, Table 32. Typical and maximum current consumption in Run mode, code with data processing running from ITCM, regulator ON and Table 33. Typical and maximum current consumption in Run mode, code with data processing running from flash memory, cache ON. STM32H7B0xB DS13196 - Rev 7 page 193/205 |
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