STM32H7B3II datasheet(116/238 Pages) STMICROELECTRONICS

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Table 61. EMI characteristics for fHSE = 8 MHz and fHCLK = 64 MHz

Symbol Parameter

Conditions

Monitored frequency band Value

Unit

SEMI

Peak(1)

VDD = 3.6 V, TA = 25 °C, LQFP64 package, compliant with IEC 61967-2

0.1 to 30 MHz

dBµV

30 to 130 MHz

–1

130 MHz to 1 GHz

1 GHz to 2 GHz

Level(2)

0.1 GHz to 2 GHz

2.5

1. Refer to the EMI radiated test chapter of application note AN1709 "EMC design guide for STM8, STM32 and Legacy MCUs" available from

the ST website www.st.com..

2. Refer to the EMI level classification chapter of application note AN1709 "EMC design guide for STM8, STM32 and Legacy MCUs" available

from the ST website www.st.com.

6.3.14

Absolute maximum ratings (electrical sensitivity)

Based on three different tests (ESD, LU) using specific measurement methods, the device is stressed in order to

determine its performance in terms of electrical sensitivity.

Electrostatic discharge (ESD)

Electrostatic discharges (a positive then a negative pulse) are applied to the pins of each sample according to

each pin combination. This test conforms to the ANSI/ESDA/JEDEC JS-001 and ANSI/ESDA/JEDEC JS-002

standards.

Table 62. ESD absolute maximum ratings

Symbol

Ratings

Conditions

Packages

Class

Maximum

value

Unit

VESD(HBM)

Electrostatic discharge voltage

(human body model)

TA = +25 °C conforming to ANSI/ESDA/

JEDEC JS-001

Packages with SMPS

1000(2)

Packages without

SMPS

2000

VESD(CDM)

Electrostatic discharge voltage

(charge device model)

TA = +25 °C conforming to ANSI/ESDA/

JEDEC JS-002

All LQFP packages

and WLCSP

250

All BGA packages

C2a

500

1. Guaranteed by characterization results.

2. The electrostatic discharge is 2000 V for all pins, except VFBSMPS, for which the test fails at 2000 V and passes at 1600 V.

Static latchup

Two complementary static tests are required on six parts to assess the latchup performance:

•

A supply overvoltage is applied to each power supply pin

•

A current injection is applied to each input, output and configurable I/O pin

These tests are compliant with JESD78 IC latchup standard.

Table 63. Electrical sensitivities

Symbol

Parameter

Conditions

Class

Static latchup class

TJ= +130 °C, conforming to JESD78

II level A

STM32H7B3xI

Operating conditions

DS13139 - Rev 8

page 116/238

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