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STM32U535NET6QTR 데이터시트(PDF) 37 Page - STMicroelectronics

부품명 STM32U535NET6QTR
상세설명  Ultra-low-power Arm® Cortex®-M33 MCUTrustZone®FPU,240 DMIPS, up to 512 KB flash memory, 274 KB SRAM
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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STM32U535NET6QTR 데이터시트(HTML) 37 Page - STMicroelectronics

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DS14217 Rev 1
37/278
STM32U535xx
Functional overview
84
Stop 2
LPR
No
OFF
ON(5)
LSE
LSI
BOR, PVD, PVM,
RTC, TAMP, IWDG,
TEMP, VREFBUF,
ADC4,
DAC1 (2 channels),
COMP1,
OPAMP1,
LPUART1,
SPI3,
I2C3,
LPTIMx (x = 1, 3, 4),
ADF1,
LPGPIO,
LPDMA1
All other peripherals are frozen.
Reset pin, all I/Os,
BOR, PVD, PVM,
RTC, TAMP, IWDG,
TEMP,
ADC4,
COMP1,
LPUART1,
SPI3,
I2C3,
LPTIMx (x = 1,3,4),
ADF1,
LPDMA1
Stop 3
LPR
No
OFF
ON(5)
LSE
LSI
BOR,
RTC, TAMP, IWDG,
DAC1 (2 static channels),
OPAMP1
All other peripherals are frozen.
I/O configuration can be floating,
pull-up or pull-down.
Reset pin,
24 I/Os (WKUPx),
BOR, RTC, TAMP,
IWDG
Standby
LPR
OFF
LSE
LSI
BOR, RTC, TAMP, IWDG
All other peripherals are
powered off.
I/O configuration can be floating,
pull-up or pull-down.
Reset pin,
24 I/Os (WKUPx),
BOR, RTC, TAMP,
IWDG
OFF
Shutdown
OFF
OFF
LSE
RTC, TAMP
All other peripherals are
powered off.
I/O configuration can be floating,
pull-up or pull-down(15).
Reset pin,
24 I/Os (WKUPx),
RTC, TAMP
Table 9. STM32U535xx mode overview (continued)
Mode
Regulator(1) CPU Flash SRAM Clocks
DMA and peripherals(2)
Wake-up source



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