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STM8AF6366TCY 데이터시트(PDF) 84 Page - STMicroelectronics |
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STM8AF6366TCY 데이터시트(HTML) 84 Page - STMicroelectronics |
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84 / 116 page ![]() Electrical characteristics STM8AF6388 84/116 DocID031156 Rev 1 10.3.10 I2C interface characteristics Table 40. I2C characteristics Symbol Parameter Standard mode I2CFast mode I2C(1) Unit Min(2) Max(2) Min(2) Max(2) tw(SCLL) SCL clock low time 4.7 - 1.3 - µs tw(SCLH) SCL clock high time 4.0 - 0.6 - tsu(SDA) SDA setup time 250 - 100 - ns th(SDA) SDA data hold time 0(3) -0(4) 900(3) tr(SDA) tr(SCL) SDA and SCL rise time (VDD 3 V to 5.5 V) - 1000 - 300 tf(SDA) tf(SCL) SDA and SCL fall time (VDD 3 V to 5.5 V) - 300 - 300 th(STA) START condition hold time 4.0 - 0.6 - µs tsu(STA) Repeated START condition setup time 4.7 - 0.6 - tsu(STO) STOP condition setup time 4.0 - 0.6 - µs tw(STO:STA) STOP to START condition time (bus free) 4.7 - 1.3 - µs Cb Capacitive load for each bus line - 400 - 400 pF 1. fMASTER, must be at least 8 MHz to achieve max fast I2C speed (400 kHz) 2. Data based on standard I2C protocol requirement, not tested in production 3. The maximum hold time of the start condition has only to be met if the interface does not stretch the low time 4. The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the undefined region of the falling edge of SCL |
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