ST25R3912 datasheet(53/130 Pages) STMICROELECTRONICS

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DS11794 Rev 9

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ST25R3912

Functional overview

Send REQA, if there is any answer continue

Perform anticollision, and select one PICC

Send HLTA to move the selected PICC to the HALT state

Go to step 1, and repeat this procedure until all the PICCs are in HALT state and all the

UIDs have been extracted.

Anticollision procedure

After receiving the ATQA from the tags in the field, the next step is to execute the

anticollision procedure to resolve the IDs of the tags.

The procedure mainly uses the ANTICOLLISION and SELECT commands, which consist

of:

•

Select code SEL (1 byte)

•

Number of valid bits NVB (1 byte)

•

0 to 40 data bits of UID CLn according to the value of NVB

The ANTICOLLISION command uses bit oriented anticollision frame (it does not use CRC).

In this case the transmit needs to be done with direct command Transmit without CRC and

for the receive, the no_CRC_rx bit in the Auxiliary definition register must be set to 1. The

final SELECT command and its response SAK contains a CRC, so the transmit needs to be

done with command Transmit with CRC and before sending this command the configuration

bit no_CRC_rx bit in the Auxiliary definition register must be set back to 0.

If there is more than one PICC in the field, the collision will occur when the tags reply to the

ANTICOLLISION command during anticollision, when the PICCs reply back with their UID.

This collision can occur after a complete byte (Full byte scenario) or it can occur within a

byte (Split byte scenario). The antcl bit in ISO14443A and NFC 106kb/s settings register

must be set during this procedure too. As a result, the ST25R3912 does not trigger a

Framing Error. This bit is also responsible for correct timing of anticollision and correct parity

extraction.

Note:

It must only be set before sending an anticollision frame, REQA or WUPA. This bit must not

be used in any other commands.

Figure 22 shows how to implement the anticollision with ST25R3912.

Since SPI is byte oriented, in case of Split byte scenario, the invalid MSB bits must be

ignored when reading out the FIFO for the received data. Similarly, 0s must be

concatenated as MSB bits to complete a byte for the Transmit (which will then be ignored

based on register 0x1E).

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