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9LRS3165BGILF 데이터시트(PDF) 21 Page - Renesas Technology Corp

부품명 9LRS3165BGILF
상세설명  64-pin Industrial Temperature Range CK505 Compatible Clock
PDF  29 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

9LRS3165BGILF 데이터시트(HTML) 21 Page - Renesas Technology Corp

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21
9LRS3165BI
Datasheet
1581B—01/06/15
Byte 12 Byte Count Register
Bit
Name
Description
Type
0
1
Default
7
Reserved
Reserved
RW
-
-
0
6
Reserved
Reserved
RW
-
-
0
5
BC5
RW
-
-
0
4
BC4
RW
-
-
0
3
BC3
RW
-
-
1
2
BC2
RW
-
-
1
1
BC1
RW
-
-
0
0
BC0
RW
-
-
1
Byte 13 Single Ended Output Slew Rate Control Register
Bit
Name
Description
RW
0
1
Default
7
REF
RW
00 = Hi-Z
01 = 1.4 V/ns
0
6
REF
RW
10 = 2.0 V/ns
11 = 2.4 V/ns
1
5
27M_FIX
RW
00 = Hi-Z
01 = 1.4 V/ns
0
4
27M_FIX
RW
10 = 2.0 V/ns
11 = 2.4 V/ns
1
3
27M_SS
RW
00 = Hi-Z
01 = 1.4 V/ns
0
2
27M_SS
RW
10 = 2.0 V/ns
11 = 2.4 V/ns
1
1
Reserved
Reserved
RW
-
-
0
0
Reserved
Reserved
RW
-
-
0
Byte 14 Reserved
Bit
Name
Description
Type
0
1
Default
7
Reserved
Reserved
RW
-
-
X
6
Reserved
Reserved
RW
-
-
X
5
Reserved
Reserved
RW
-
-
X
4
Reserved
Reserved
RW
-
-
X
3
Reserved
Reserved
RW
-
-
X
2
Reserved
Reserved
RW
-
-
X
1
Reserved
Reserved
RW
-
-
X
0
Reserved
Reserved
RW
-
-
X
Byte 15 Reserved
Bit
Name
Description
Type
0
1
Default
7
Reserved
Reserved
RW
-
-
X
6
Reserved
Reserved
RW
-
-
X
5
Reserved
Reserved
RW
-
-
X
4
Reserved
Reserved
RW
-
-
X
3
Reserved
Reserved
RW
-
-
X
2
Reserved
Reserved
RW
-
-
X
1
Reserved
Reserved
RW
-
-
X
0
Reserved
Reserved
RW
-
-
X
Byte 16 Reserved
Bit
Name
Description
Type
0
1
Default
7
Reserved
Reserved
RW
-
-
X
6
Reserved
Reserved
RW
-
-
X
5
Reserved
Reserved
RW
-
-
X
4
Reserved
Reserved
RW
-
-
X
3
Reserved
Reserved
RW
-
-
X
2
Reserved
Reserved
RW
-
-
X
1
Reserved
Reserved
RW
-
-
X
0
Reserved
Reserved
RW
-
-
X
Byte 17 SRC Output Control Register
Bit
Name
Description
RW
0
1
Default
7
SATA/SRC2_STP_CRTL
If set, SATA/SRC2 stops with PCI_STOP#
RW
Free Running
Stops with PCI_STOP#
assertion
0
6
SRC3_STP_CRTL
If set, SRC3 stops with PCI_STOP#
RW
Free Running
Stops with PCI_STOP#
assertion
0
5
SRC4_STP_CRTL
If set, SRC4 stops with PCI_STOP#
RW
Free Running
Stops with PCI_STOP#
assertion
0
4
SRC6_STP_CRTL
If set, SRC6 stops with PCI_STOP#
RW
Free Running
Stops with PCI_STOP#
assertion
0
3
SRC7_STP_CRTL
If set, SRC7 stops with PCI_STOP#
RW
Free Running
Stops with PCI_STOP#
assertion
0
2
Reserved
Reserved
RW
-
-
0
1
SRC8_STP_CRTL
If set, SRC8 stops with PCI_STOP#
RW
Free Running
Stops with PCI_STOP#
assertion
0
0
SRC9_STP_CRTL
If set, SRC9 stops with PCI_STOP#
RW
Free Running
Stops with PCI_STOP#
assertion
0
Read Back byte count register,
max bytes = 32
Slew Rate Control
Slew Rate Control
Slew Rate Control



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