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ASI4U / ASI4U-E / ASI4U-F Datasheet

January 26, 2016

4.7.4.

Synchronous Data I/O Mode

As defined in the AS-Interface Complete Specification, a master successively polls the network incrementing the

slave addresses from the lowest to the highest. Hence, data input and output operations normally take place at

different times in different slaves. To support applications that require simultaneous Data I/O operations on a

given number of slaves in the network, a Synchronous Data I/O Mode is provided.

The feature is enabled if the Synchronous_Data_IO flag is set in the Firmware Area of the EEPROM (=1).

Activation of the feature also depends on the value of the P2_Sync_Data_IO_Activation flag. The following coding

applies:

Table 4.15 Activation States of Synchronous Data IO Mode

Synchronous_Data_IO FLAG

P2_Sync_Data_IO_Activation FLAG

INPUT VALUE

AT P2

SYNCHRONOUS DATA

I/O MODE

Don’t care

Deactivated

Don’t care

Activated

Low level (= 0)

Activated

High level (= 1)

Deactivated

The Parameter Port signal P2 is sampled at the rising edge of the Data Strobe (LOW/HIGH transition) signal

to determine the Data I/O behavior at the next Data Output event.

If the IC is operated in Parameter Multiplex Mode (see section 4.6.1) while the Synchronous_Data_IO flag and

P2_Sync_Data_IO_Activation flag are set, the Parameter Multiplex Mode remains disabled for Parameter Port pin

P2. This is to avoid erroneous deactivation of the Synchronous Data IO Mode if no external driver is connected.

Once activated, input data sampling as well as output data driving events are moved to different times

synchronized to the polling cycle of the AS-i network. Nevertheless, the communication principles between

master and slave remain unchanged compared to regular operation. The following rules apply:

• Data I/O is triggered by the DEXG call to the slave with the lowest slave address in the network. Based on

the fact that a master is calling slaves successively with rising slave addresses, the ASI4U/

ASI4U-E/ASI4U-F considers the trigger condition to be true if the slave address of a received DEXG call is

less than the slave address of the previous (correctly received) DEXG call.

Data I/O is only triggered if the slave has (correctly) received data during the last cycle. If the slave did not

receive data (e.g., due to a communication error), the Data Outputs are not changed and no Data Strobe is

generated (“arm+fire” principle). The inputs, however, are always sampled at the trigger event.

• If the slave with the lowest address in the network is operated in the Synchronous Data I/O Mode, it

postpones the output event for the received data for a full AS-i cycle. This is to keep all output data of a

particular cycle image together.

Note: To make this feature useful, the master must generate a data output cycle image once before the

start of every AS-i cycle. The image is derived from the input data of the previous cycle(s) and other control

events. If an AS-i cycle has started, the image must not change. If A and B slaves are installed in parallel at

one address, the master must address all A Slaves in one cycle and all B Slaves in the other cycle.

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