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AT25DF041B 데이터시트(PDF) 13 Page - Renesas Technology Corp |
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AT25DF041B 데이터시트(HTML) 13 Page - Renesas Technology Corp |
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13 / 64 page ![]() DS-AT25DF041B-040 Rev. H Page 13 12/13/22 © 2022 Renesas Electronics AT25DF041B Datasheet Miscellaneous Commands Reset F0h 1111 0000 Up to 70 MHz 0 0 1(D0h) Read Manufacturer and Device ID 9Fh 1001 1111 Up to 70 MHz 0 0 1 to 4 Deep Power-Down B9h 1011 1001 Up to 70 MHz 0 0 0 Resume from Deep Power-Down ABh 1010 1011 Up to 70 MHz 0 0 0 Ultra Deep Power-Down 79h 0111 1001 Up to 70 MHz 0 0 0 1. Varies by voltage range. See Table 13.4 “AC Characteristics - Maximum Clock Frequencies.” 2. Three address bytes are required for the first operation to designate the address to start programming. Afterwards, the internal address counter automatically increments, so subsequent Sequential Program Mode operations only require clocking in of the opcode and the data byte until the Sequential Program Mode has been exited Table 2. Command Listing (Continued) Command Opcode Clock Frequency Address Bytes Dummy Bytes Data Bytes |
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