ILPS28QSWTR datasheet(35/52 Pages) STMICROELECTRONICS

35 / 52 page

10.7

CTRL_REG2 (11h)

Control register 2 (R/W)

BOOT

FS_MODE

LFPF_CFG

EN_LPFP

BDU

SWRESET

ONESHOT

BOOT

Reboot memory content. Default value: 0

(0: normal mode; 1: reboot memory content)

FS_MODE

Full-scale selection. Default value: 0

(0: mode 1, full scale up to 1260 hPa; 1: mode 2, full scale up to 4060 hPa)

LFPF_CFG

Low-pass filter configuration. Default value: 0

(0: ODR/4; 1: ODR/9)

EN_LPFP

Enable low-pass filter on pressure data. Default value: 0

(0: disable, 1: enable)

BDU(1)

Block data update. Default value: 0

(0: continuous update;

1: output registers not updated until MSB and LSB have been read)

SWRESET

Software reset. Default value: 0

(0: normal mode; 1: software reset).

The bit is self-cleared when the reset is completed.

ONESHOT

Enable one-shot mode. Default value: 0

(0: idle mode; 1: a new dataset is acquired)

1. To guarantee the correct behavior of the BDU feature, PRESS_OUT_H (2Ah) must be the last address read.

The BOOT bit is used to refresh the content of the internal registers stored in the non-volatile memory block. At

device power-up, the content of the non-volatile memory block is transferred to the internal registers related to

the trimming functions to allow correct behavior of the device itself. If for any reason the content of the trimming

registers is modified, it is sufficient to use this bit to restore the correct values. When the BOOT bit is set to 1,

the content of the internal non-volatile memory block is copied into the corresponding internal registers and is

used to calibrate the device. These values are factory trimmed and they are different for every device. They allow

the correct behavior of the device and normally they should not be changed. At the end of the boot process, the

BOOT bit is set again to 0 by hardware. The BOOT bit takes effect immediately after it is set to 1.

The SWRESET bit resets the volatile registers to the default value. It returns to 0 by hardware.

The ONESHOT bit is used to start a new conversion when the ODR[3:0] bits in CTRL_REG1 (10h) are set

to 0000. Writing a 1 to ONESHOT triggers a single measurement of pressure and temperature. Once the

measurement is done, the ONESHOT bit self-clears, the new data are available in the output registers, and the

STATUS (27h) bits are updated.

ILPS28QSW

CTRL_REG2 (11h)

DS13905 - Rev 1

page 35/52

ILPS28QSWTR 데이터시트(PDF) 35 Page - STMicroelectronics

ILPS28QSWTR 데이터시트(HTML) 35 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

데이터시트 다운로드

링크 URL