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SC83C451CGA68 데이터시트(PDF) 10 Page - NXP Semiconductors

부품명 SC83C451CGA68
상세설명  80C51 8-bit microcontroller family 4K/128 OTP/ROM/ROMless, expanded I/O
PDF  22 Pages
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제조업체  PHILIPS [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

SC83C451CGA68 데이터시트(HTML) 10 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
80C451/83C451/87C451
80C51 8-bit microcontroller family
4K/128 OTP/ROM/ROMless, expanded I/O
1998 May 01
10
DC ELECTRICAL CHARACTERISTICS1
Tamb = 0°C to +70°C, VCC = 5V ±10%, VSS = 0V (87C451, 83C451, 80C451)
TEST
LIMITS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYPICAL1
MAX
UNIT
VIL
Input low voltage; except EA
–0.5
0.2VCC–0.1
V
VIL1
Input low voltage to EA
0
0.2VCC–0.3
V
VIH
Input high voltage; except XTAL1, RST
0.2VCC+0.9
VCC+0.5
V
VIH1
Input high voltage; XTAL1, RST
0.7VCC
VCC+0.5
V
VOL
Output low voltage; ports 1, 2, 3, 4, 5, 6
IOL = 1.6mA2
0.45
V
VOL1
Output low voltage; port 0, ALE, PSEN
IOL = 3.2mA2
0.45
V
VOH
Output high voltage; ports 1, 2, 3, 4, 5, 6
IOH = –60µA,
2.4
V
IOH = –25µA
0.75VCC
V
IOH = –10µA
0.9VCC
V
VOH1
Output high voltage (port 0 in external bus mode, ALE,
PSEN)3
IOH = –800µA,
IOH = –300µA
IOH = –80µA
2.4
0.75VCC
0.9VCC
V
V
V
IIL
Logical 0 input current,; ports 1, 2, 3, 4, 5, 6
VIN = 0.45V
–50
µA
ITL
Logical 1-to-0 transition current; ports 1, 2, 3, 4, 5, 6
See note 4
–650
µA
ILI
Input leakage current; port 0
VIN = VIL or VIH
+10
µA
ICC
Power supply current:
See note 6
Active mode @ 12MHz5
11.5
25
mA
Idle mode @ 12MHz5
1.3
4
mA
Power down mode
3
50
µA
RRST
Internal reset pull-down resistor
50
300
k
Ω
CIO
Pin capacitance7
10
pF
NOTES:
1. Typical ratings are based on a limited number of samples taken from early manufacturing lots and are not guaranteed. The values listed are
at room temperature, 5V.
2. Capacitive loading on ports 0 and 2 may cause spurious noise to be superimposed on the VOLs of ALE and ports 1 and 3. The noise is due
to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0 transitions during bus operations. In the
worst cases (capacitive loading > 100pF), the noise pulse on the ALE pin may exceed 0.8V. In such cases, it may be desirable to qualify
ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input.
3. Capacitive loading on ports 0 and 2 may cause the VOH on ALE and PSEN to momentarily fall below the 0.9VCC specification when the
address bits are stabilizing.
4. Pins of ports 1, 2 and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its
maximum value when VIN is approximately 2V.
5. ICCMAX at other frequencies is given by:
Active mode: ICCMAX = 0.94 X FREQ + 13.71
Idle mode: ICCMAX = 0.14 X FREQ +2.31
where FREQ is the external oscillator frequency in MHz. ICCMAX is given in mA. See Figure 13.
6. See Figures 14 through 17 for ICC test conditions.
7. CIO applies to ports 1 through 6, AFLAG, BFLAG, XTAL1, XTAL2.



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