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DA9062 데이터시트(PDF) 15 Page - Renesas Technology Corp

부품명 DA9062
상세설명  PMIC for Applications Requiring up to 8.5 A
PDF  101 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

DA9062 데이터시트(HTML) 15 Page - Renesas Technology Corp

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DA9062
PMIC for Applications Requiring up to 8.5 A
Datasheet
Revision 3.8
15-Feb-2022
CFR0011-120-00
15 of 99
© 2022 Renesas Electronics
Unless otherwise noted, the following is valid for TJ = -40 °C to +125 ºC, VSYS = 2.8 V to 5.5 V.
Table 10: 2-Wire Interface Electrical Characteristics
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Bus free time
STOP to START
tBUF
0.5
µs
Bus line capacitive load
CB
150
pF
Standard/Fast/Fast+ Mode
SCL clock frequency
fSCL
VDDIO
≥ 1.5 V
Note 1
0
1.0
MHz
Start condition set-up time
tSU_STA
260
ns
Start condition hold time
tH_STA
260
ns
SCL low time
tW_CL
500
ns
SCL high time
tW_CH
260
ns
2-wire SCL and SDA rise time
tR
(input requirement)
1000
ns
2-wire SCL and SDA fall time
tF
(input requirement)
300
ns
Data set-up time
tSU_D
50
ns
Data hold-time
tH_D
0
ns
Data valid time
tVD_D
450
ns
Data valid time acknowledge
tVD_ACK
450
ns
Stop condition set-up time
tSU_STO
260
ns
High Speed Mode
SCL clock frequency
fSCL
VDDIO
≥ 1.8 V
Note 1
0
3.4
MHz
Start condition set-up time
tSU_STA
160
ns
Start condition hold time
tH_STA
160
ns
SCL low time
tW_CL
160
ns
SCL high time
tW_CH
60
ns
2-wire SCL and SDA rise time
tR
(input requirement)
160
ns
2-wire SCL and SDA fall time
tF
(input requirement)
160
ns
Data set-up time
tSU_D
10
ns
Data hold-time
tH_D
0
ns
Stop condition set-up time
tSU_STO
160
ns
Note 1
Minimum clock frequency is 10 kHz if TWOWIRE_TO is enabled.



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