2

Pins description

Figure 3. Pinout (Top transparent view)

GND

CC 3

VDRV

GND

GND

GND

GND

GND

GND

GND

GND

GND

IN

IN

IN

IN

IN

28

40

41

29

V

24

P

23

P

22

V

21

P

20

P

26

V

25

V

27

V

NC 1

A

2

V

4

P

5

GL

6

P

7

P

8

P

9

P

Table 1. Pin description

Pin no.

Pin name

Description

1, 31, 37

NC

This pin can be left floating or connected to AGND

2

AGND

Ground for internal circuitry (not a ground for the drivers)

3

VCC

Supply voltage for internal circuitry (does not power the drivers)

4

VDRV

Supply voltage for internal gate drive

5, 7 to 9, 20 to 24,

40

PGND

Power ground (note: pin 5 is intended to be used as a Kelvin pickup of the PGND for

IMON sensing)

6, 41

GATEL (GL)

Low side MOSFET gate signal for observation purposes - do not connect externally

10 to 19

SW

Switch node of the power stage. Connect directly to output inductor

25 to 30

VIN

Power stage input voltage. Drain of high side MOSFET

32

PHASE

Return path of HS gate driver and the boot capacitor. Connected internally to the

SW node.

Do not connect this pin to the switch node externally

33

BOOT

High side driver bootstrap voltage. Connect a 0.1 μF to 1 μF capacitor between

BOOT and PHASE pins

34

PWM

PWM input logic. tri-state PWM input signal means both HS and LS MOSFETs are

turned off

35

EN

Enables the driver

36

TMON/FAULT

Temperature monitor with a conversion factor of 8 mV/°C with 0.8 V offset /

catastrophic fault pin

38

IMON

Output voltage representative of the inductor current with a ratio of 5 mV/A

39

REFIN

Internal reference voltage for IOUT, but can be overdriven externally if desired

PM7080A

Pins description

DS13910 - Rev 1

page 3/23