ICS854110AKI REVISION B JANUARY 27, 2011

2

©2011 Integrated Device Technology, Inc.

ICS854110I Data Sheet

2.5V DIFFERENTIAL LVDS CLOCK BUFFER

Table 1. Pin Descriptions

NOTE: Pulldown refers to an internal input resistor. See Table 2, Pin Characteristics, for typical values.

Table 2. Pin Characteristics

Number

Name

Type

Description

1

ISET

An external fixed resistor (RSET) from this pin to ground is needed to provide a

reference current for setting the slew rate of the differential outputs Q[0:9], nQ[0:9].

See Table 3C for function.

2

CLK_SEL

Input

Pulldown

Input clock select. See Table 3A for function. LVCMOS/LVTTL interface levels.

3

CLK0

Input

Non-inverting clock/data input 0.

4

nCLK0

Input

Inverting differential clock input 0.

5, 9, 25

GND

Power

Power supply ground.

6

CLK1

Input

Non-inverting clock/data input 1.

7

nCLK1

Input

Inverting differential clock input 1.

8

nOE

Input

Pulldown

Output enable. See Table 3B for function. LVCMOS/LVTTL interface levels.

10, 11

nQ9, Q9

Output

Differential output pair 9. LVDS interface levels.

12, 13

nQ8, Q8

Output

Differential output pair 8. LVDS interface levels.

14, 15

nQ7, Q7

Output

Differential output pair 7. LVDS interface levels.

16, 32

VDD

Power

Power supply pins.

17, 18

nQ6, Q6

Output

Differential output pair 6. LVDS interface levels.

19, 20

nQ5, Q5

Output

Differential output pair 5. LVDS interface levels.

21, 22

nQ4, Q4

Output

Differential output pair 4. LVDS interface levels.

23, 24

nQ3, Q3

Output

Differential output pair 3. LVDS interface levels.

26, 27

nQ2, Q2

Output

Differential output pair 2. LVDS interface levels.

28, 29

nQ1, Q1

Output

Differential output pair 1. LVDS interface levels.

30, 31

nQ0, Q0

Output

Differential output pair 0. LVDS interface levels.

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

CIN

Input Capacitance

4

pF

RPULLDOWN

Input Pulldown Resistor

51

k

Ω