 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
INA236 데이터시트(PDF) 23 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
INA236 데이터시트(HTML) 23 Page - Texas Instruments |
|
|
23 / 44 page  Table 7-10. Mask/Enable Register Field Descriptions (continued) Bit Field Type Reset Description 2 OVF (Math Over-flow) R 0b This bit is set to '1' if an arithmetic operation resulted in an overflow error. It indicates that current and power data may be invalid. 1 APOL (Alert Polarity) R/W 0b Alert Polarity bit sets the Alert pin polarity. 0b = Normal (Active-low open drain) 1b= Inverted (active-high ) 0 LEN (Alert Latch Enable) R/W 0b When the Alert Latch Enable bit is set to Transparent mode, the Alert pin and Alert Function Flag (AFF) bit resets to the idle states when the fault condition has been cleared. When the Alert Latch Enable bit is set to Latch mode, the Alert pin and AFF bit remains active following a fault until this register flag has been read. This bit must be set to use the I2C Alert Response function. 0b = Transparent 1b = Latched Alert pin Return to the Summary Table. 7.6.1.8 Alert Limit Register (Address = 7h) [reset = 0000h] The alert limit register is shown in Table 7-11. Table 7-11. Alert Limit Register Field Descriptions Bit Field Type Reset Description 15-0 LIMIT R/W 0000h The Alert Limit Register contains the value used to compare to the register selected in the Mask/Enable Register to determine if a limit has been exceeded. A two's complement value must be used for the Shunt Over Voltage limit. Limit values entered should match the format of the targeted register Return to the Summary Table. 7.6.1.9 Manufacturer ID Register (Address = 3Eh) [reset = 5449h] The manufacturer ID register is shown in Table 7-12. Table 7-12. MANUFACTURE_ID Register Field Descriptions Bit Field Type Reset Description 15-0 MANUFACTURE_ID R 5449h Reads back TI in ASCII Return to the Summary Table. 7.6.1.10 Device ID Register (Address = 3Fh) [reset = A080h] The Device ID register is shown in Table 7-13. Table 7-13. DEVICE_ID Register Field Descriptions Bit Field Type Reset Description 15-3 DIEID R A080h Stores the device identification bits 3-0 Reserved R 0h Always read 0 Return to the Summary Table. www.ti.com INA236 SBOSA81C – MAY 2021 – REVISED DECEMBER 2022 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 23 Product Folder Links: INA236 |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
