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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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AFE7901 데이터시트(PDF) 3 Page - Texas Instruments |
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AFE7901 데이터시트(HTML) 3 Page - Texas Instruments |
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3 / 160 page  4 Description (continued) Each receiver chain includes a 25-dB range DSA (Digital Step Attenuator), followed by a 3-GSPS ADC (analog- to-digital converter). Each receiver channel has an analog peak power detector and various digital power detectors to assist an external or internal autonomous automatic gain controller, and RF overload detectors for device reliability protection. Flexible decimation options provide optimization of signal bandwidth up to 400 MHz using one or two digital down converters (DDCs). 5 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. DATE REVISION NOTES April 2023 * Initial Release www.ti.com AFE7901 SBASAO5 – APRIL 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: AFE7901 |
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