000-0055321-102

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SLG55321-130010V

Pin Description

Overview

The SLG55321 N-Channel FET Gate Drivers are used for controlling and ramping slew rate of the source voltage on N-Channel

FET switches from a CMOS logic level input. Intended as a supporting control element for switched voltage rails in energy efficient,

advanced power management systems, the SLG55321 also integrates circuits to discharge opened switched voltage rails. The

gate driver is available in a variety of configurations supporting a range of turn-on slew rates from 0.80 V/ms up to 2 V/ms which,

depending on load supplying source voltages in the range of 1.0 V to 20 V results in ramp times from 200

µs to over 20ms (see

Application Section). Additionally, an internal discharge circuit provides a controlled path to remove charge from open power rails.

The SLG55321 gate drive is packaged in an 8 pin DFN package.

When used with external N-Channel FETs, the SLG55321 supports low transient, energy efficient switching of high current loads

at source voltages ranging from 1.0 V to 20 V.

.

Pin Name

Pin Number

Type

Pin Description

VCC

1

Power

Supply Voltage

ON

2

Input

CMOS Logic Level

DIS2

3

Output

Discharge Connection for Load2.

GND

4

GND

Ground

D

5

Input

FET Drain Connection (Connect to FET with highest VD voltage)

S/DIS1

6

Input/Output

Source Connection,

Discharge Connection for Load1

G1/G2/G3

7

Output

FET Gate Drive for FET1, FET2, FET3. A minimum of a 1 k

Ω resistor

must be placed between the gate of MOSFET 1 and the gate of

MOSFET 2 and another 1 k

Ω resistor between the gate of MOSFET

2 and the gate of MOSFET 3.

DIS3

8

Output

Discharge Connection for Load3. Cannot exceed 5V.

Ordering Information

Part Number

Ramp Slew

Rate

(Volts/ms)

Delay Time

(ms)

Discharge

Resistor

(ohms)

Package Type

SLG55321-130010V

1.30

0.5

200

TDFN-8

SLG55321-130010VTR

1.30

0.5

200

TDFN-8 - Tape and Reel (3k units)