2

FN8170.3

August 29, 2006

DETAILED FUNCTIONAL DIAGRAM

Ordering Information

PART NUMBER

PART

MARKING

VCC LIMITS (V)

POTENTIOMETER

ORGANIZATION

(k

)

TEMPERATURE

RANGE (°C)

PACKAGE

PKG. DWG. #

X9260TS24I

X9260TS I

5 ±10%

100

-40 to +85

24 Ld SOIC (300 mil)

M24.3

X9260TS24IZ (Note)

X9260TS ZI

-40 to +85

24 Ld SOIC (300 mil)

(Pb-free)

M24.3

X9260US24

X9260US

50

0 to +70

24 Ld SOIC (300 mil)

M24.3

X9260US24Z (Note)

X9260US Z

0 to +70

24 Ld SOIC (300 mil)

(Pb-free)

M24.3

X9260TS24I-2.7

X9260TS G

2.7 to 5.5

100

-40 to +85

24 Ld SOIC (300 mil)

M24.3

X9260TS24IZ-2.7 (Note) X9260TS ZG

-40 to +85

24 Ld SOIC (300 mil)

(Pb-free)

M24.3

X9260US24-2.7

X9260US F

50

0 to +70

24 Ld SOIC (300 mil)

M24.3

X9260US24Z-2.7 (Note) X9260US ZF

0 to +70

24 Ld SOIC (300 mil)

(Pb-free)

M24.3

*Add "T1" suffix for tape and reel.

NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate

termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL

classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

R0 R1

R2 R3

Wiper

Counter

Register

(WCR)

Resistor

Array

Pot 1

RH1

RL1

R0 R1

R2 R3

Wiper

Counter

Register

(WCR)

RH0 RL0

Data

8

RW0

RW1

Pot 0

INTERFACE

AND

CONTROL

CIRCUITRY

VCC

VSS

256-taps

50K

 and 100K

CS

SCK

A0

SO

SI

HOLD

WP

A1

Power-on

Recall

Power-on

Recall

V+

V-

X9260