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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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HC705MC4GRS/D 데이터시트(PDF) 142 Page - NXP Semiconductors |
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HC705MC4GRS/D 데이터시트(HTML) 142 Page - NXP Semiconductors |
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142 / 180 page  Core Timer MC68HC705MC4 — Rev. 2.0 Core Timer RTIE — Real-Time Interrupt Enable When this bit is set, a CPU interrupt request is generated when the RTIF bit is set. Reset clears this bit. RT1:RT0 — Real-Time Interrupt Rate Select These two bits select 1-of-4 taps from the real-time interrupt circuit. Table 12-1 shows the available interrupt rates with several f OP values. Reset sets these RT0 and RT1, selecting the lowest periodic rate and therefore the maximum time in which to alter these bits if necessary. Care should be taken when altering RT0 and RT1 if the time-out period is imminent or uncertain. If the selected tap is modified during a cycle in which the counter is switching, an RTIF could be missed or an additional one could be generated. To avoid problems, the COP should be cleared before changing RTI taps. Table 12-1. RTI Rates RT1:RT0 RTI Rates at Bus Frequency of: 16.384 kHz 3.0 MHz Divide Ratio 00 1 sec 5.5 ms 214 01 2 sec 10.9 ms 215 10 3 sec 21.8 ms 216 11 8 sec 43.75 ms 217 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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