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DSP56307/D 데이터시트(PDF) 32 Page - NXP Semiconductors

부품명 DSP56307/D
상세설명  24-BIT DIGITAL SIGNAL PROCESSOR
PDF  156 Pages
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제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo NXP - NXP Semiconductors

DSP56307/D 데이터시트(HTML) 32 Page - NXP Semiconductors

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DSP56307 Technical Data
MOTOROLA
Signals/Connections
SCI
Table 1-13
Serial Communication Interface
Signal Name
Type
State During
Reset
Signal Description
RXD
PE0
Input
Input or
Output
Input
Serial Receive Data
ÑThis input receives byte
oriented serial data and transfers it to the SCI
receive shift register.
Port E 0
ÑThe default configuration following
reset is GPIO input PE0. When configured as
PE0, signal direction is controlled through the
SCI port directions register (PRR). The signal
can be configured as an SCI signal RXD through
the SCI port control register (PCR).
Note:
This signal has a weak keeper to maintain the last
state even if all drivers are tri-stated.
TXD
PE1
Output
Input or
Output
Input
Serial Transmit Data
ÑThis signal transmits
data from SCI transmit data register.
Port E 1
ÑThe default configuration following
reset is GPIO input PE1. When configured as
PE1, signal direction is controlled through the
SCI PRR. The signal can be configured as an SCI
signal TXD through the SCI PCR.
Note:
This signal has a weak keeper to maintain the last
state even if all drivers are tri-stated.
SCLK
PE2
Input/
Output
Input or
Output
Input
Serial Clock
ÑThis is the bidirectional
Schmitt-trigger input signal providing the input
or output clock used by the transmitter and/or
the receiver.
Port E 2
ÑThe default configuration following
reset is GPIO input PE2. When configured as
PE2, signal direction is controlled through the
SCI PRR. The signal can be configured as an SCI
signal SCLK through the SCI PCR.
Note:
This signal has a weak keeper to maintain the last
state even if all drivers are tri-stated.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Not Recommended for New Design



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