LTC3709 datasheet(21/24 Pages) LINER

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LTC3709

3709f

APPLICATIO S I FOR ATIO

Figure 8. Kelvin Sensing

SENSE + SENSE –

(8b) Sensing a Resistor

3709 F08

RSENSE

SENSE + SENSE –

(8a) Sensing the Bottom MOSFET

MOSFET

• Segregate the signal and power grounds. All small

signal components should return to the SGND pin at

one point, which is then tied to a “clean” point in the

power ground such as the “–” node of CIN.

• Minimize impedance between input ground and output

ground.

• Connect PGND1 to the source of M2 or RS1 (QFN)

directly. This also applies to channel 2.

• Place M2 as close to the controller as possible, keeping

the PGND1, BG1 and SW1 traces short. The same for

the other channel. SW2 trace should connect to the

drain of M2 directly.

• Connect the input capacitor(s) CIN close to the power

MOSFETs: (+) node to drain of M1, (–) node to source

of M2. This capacitor carries the MOSFET AC current.

• Keep the high dV/dt SW, BOOST and TG nodes away

from sensitive small-signal nodes.

• Connect the DRVCC decoupling capacitor CVCC closely

to the DRVCC and PGND pins.

• Connect the top driver boost capacitor CB closely to the

BOOST and SW pins.

• Connect the VIN pin decoupling capacitor CF closely to

the VCC and PGND pins.

• Are the SENSE– and SENSE+ leads routed together with

minimum PC trace spacing? The filter capacitor be-

tween SENSE– and SENSE+ (CSENSE) should be as close

as possible to the IC. Ensure accurate current sensing

with Kelvin connections at the sense resistor as shown

in Figure 8.

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