TS5A3166

0.9 W SPST ANALOG SWITCH

SCDS186 − FEBRUARY 2005

www.ti.com

2

ORDERING INFORMATION

TA

PACKAGE(1)

ORDERABLE PART NUMBER

TOP-SIDE MARKING(2)

NanoStar

 − WCSP (DSBGA)

0.23-mm Large Bump − YEP

Tape and reel

TS5A3166YEPR

−40

°C to 85°C

NanoFree

 − WCSP (DSBGA)

0.23-mm Large Bump − YZP (Pb-free)

Tape and reel

TS5A3166YZPR

SOT (SOT-23) − DBV

Tape and reel

TS5A3166DBVR

JAS_

SOT (SC-70) − DCK

Tape and reel

TS5A3166DCKR

JF_

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.

(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.

YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character

to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

V+

Supply voltage range(3)

−0.5

6.5

V

VNO

VCOM

Analog voltage range(3)(4)(5)

−0.5

V+ + 0.5

V

IK

Analog port diode current

VNO, VCOM < 0

−50

mA

INO

On-state switch current

VNO, VCOM = 0 to V+

−200

200

mA

INO

ICOM

On-state peak switch current(6)

VNO, VCOM = 0 to V+

−400

400

mA

VI

Digital input voltage range(3)(4)

−0.5

6.5

V

IIK

Digital input clamp current

VI < 0

−50

mA

I+

Continuous current through V+

100

mA

IGND

Continuous current through GND

−100

mA

(7)

DBV package

206

θJA

Package thermal impedance(7)

DCK package

252

°C/W

θJA

Package thermal impedance(7)

YEP/YZP package

132

C/W

Tstg

Storage temperature range

−65

150

°C

(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade

device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified

is not implied.

(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum

(3) All voltages are with respect to ground, unless otherwise specified.

(4) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

(5) This value is limited to 5.5 V maximum.

(6) Pulse at 1-ms duration < 10% duty cycle

(7) The package thermal impedance is calculated in accordance with JESD 51-7.