CS5320 datasheet(136/160 Pages) AMCC

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S5320 – PCI Match Maker: Pass-Thru Operation

136

DS1656

AMCC Confidential and Proprietary

Revision 5.03 – June 14, 2006

Data Sheet

Clock 10:

DXFR# is asserted indicating that data will

be transferred on the next rising clock edge (clock 11).

DATA4 is driven onto the DQ[31:0] bus. PTATN# is

deasserted indicating that this will be the last data

phase.

Clock 11:

The final data word (DATA4) must be

latched by the Add-On device at the rising edge of this

clock. PTBE# is driven to Fh indicating all 4 bytes have

been accessed. PTNUM and PTWR may change state

since the access is complete.

Clock 12:

PTBE# may change state.

Active Mode with 16/8-bit data buses

When the S5320 is programmed in Active mode and

16-bit, the DXFR# output will strobe twice for every

PCI 32-bit word that has been read/written. Each

DXFR# assertion signifies that a 16-bit word has been

transferred to the Add-On side. The first DXFR# com-

pletion will be for the least significant 16-bit word of a

32-bit word (“LOW” in Figures 77, 79 and 80), while

the second transfer will be for the most significant 16-

bit word (“HIGH” in Figures 77, 79 and 80). If the cur-

rent PCI access has only 2 bytes valid (PCI BE[3:0]#

encoding of Ch or 3h instead of 0h), then the S5320

will still assert a 2 cycle completion but one of them

will not contain valid data (PTBE[3:0]#=Fh). If the pro-

grammed wait states for the current Pass-Thru region

is not zero, then the S5320 will insert the programmed

wait states before the “LOW” data word and also

between the “LOW” and “HIGH” data words. Figure 77

shows a PCI read to a 16-bit Add-On region with two

programmed wait states. Note that a PCI read to an 8-

bit Add-On would be the same as Figure 77 except

that there would be 4 data transfers (one for each

byte) vice 2.

As in Passive mode, in Active mode, the word read/

write order is determined by the Endian conversion

programmed into the S5320.

Figure 78. Active Mode PCI Read w/ Programmed Wait States

ADCLK

PTATN#

PTBURST#

PTNUM[1:0]

PTWR

PTBE[3:0]#

DXFR#

DQ[31:0]

PTADR#

PTWAIT#

PTADDR

Data1

Data2

Data3

DATA2

DATA3

DATA1

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