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ICS9DB801C 데이터시트(PDF) 4 Page - Renesas Technology Corp

부품명 ICS9DB801C
상세설명  Eight Output Differential Buffer for PCI Express (50-200MHz)
PDF  20 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ICS9DB801C 데이터시트(HTML) 4 Page - Renesas Technology Corp

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IDTTM/ICSTM Eight Output Differential Buffer for PCI Express (50-200MHz)
9DB801C
REV E 01/27/11
ICS9DB801C
Eight Output Differential Buffer for PCI Express (50-200MHz)
4
Pin Description for OE_INV = 0
PIN #
PIN NAME
PIN TYPE
DESCRIPTION
25
GND
POWER
Ground pin.
26
PD#
INPUT
Asynchronous active low input pin, with 120Kohm internal pull-
up resistor, used to power down the device. The internal clocks
are disabled and the VCO and the crystal are stopped.
27
SRC_STOP#
INPUT
Active low input to stop SRC outputs.
28
HIGH_BW#
INPUT
3.3V input for selecting PLL Band Width
0 = High, 1= Low
29
DIF_4#
OUTPUT
0.7V differential complement clock outputs
30
DIF_4
OUTPUT
0.7V differential true clock outputs
31
VDD
POWER
Power supply, nominal 3.3V
32
GND
POWER
Ground pin.
33
DIF_5#
OUTPUT
0.7V differential complement clock outputs
34
DIF_5
OUTPUT
0.7V differential true clock outputs
35
OE_5
INPUT
Active high input for enabling outputs.
0 = tri-state outputs, 1= enable outputs
36
OE_6
INPUT
Active high input for enabling outputs.
0 = tri-state outputs, 1= enable outputs
37
DIF_6#
OUTPUT
0.7V differential complement clock outputs
38
DIF_6
OUTPUT
0.7V differential true clock outputs
39
VDD
POWER
Power supply, nominal 3.3V
40
OE_INV
INPUT
This latched input selects the polarity of the OE pins.
0 = OE pins active high, 1 = OE pins active low (OE#)
41
DIF_7#
OUTPUT
0.7V differential complement clock outputs
42
DIF_7
OUTPUT
0.7V differential true clock outputs
43
OE_4
INPUT
Active high input for enabling outputs.
0 = tri-state outputs, 1= enable outputs
44
OE_7
INPUT
Active high input for enabling outputs.
0 = tri-state outputs, 1= enable outputs
45
LOCK
OUTPUT
3.3V output indicating PLL Lock Status. This pin goes high
when lock is achieved.
46
IREF
INPUT
This pin establishes the reference current for the differential
current-mode output pairs. This pin requires a fixed precision
resistor tied to ground in order to establish the appropriate
current. 475 ohms is the standard value.
47
GNDA
POWER
Ground pin for the PLL core.
48
VDDA
POWER
3.3V power for the PLL core.



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